From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

LabVIEW FPGA Idea Exchange

cancel
Showing results for 
Search instead for 
Did you mean: 
Intaris

Link Wire label to Data format

Status: New

I have recently started placing wire labels in my code to keep track of datatypes of wires flowing around my code.  This is very useful to understand what is going on on the FPGA since not all grey wires (FXP) are equal and slight mismatches can mean big trouble in the code.

 

As such I tend to label wires like "Phase FXP+25,0" and so on.

 

What I'd love to be able to do is to place a formatter in a Wire Label to be able to keep such labels up to date because at the moment it's probably more error prone than anything else due to some wires and labels not being synced any more due to code changes or bugfixes.

 

If I can set a wire label to "Phase %s" or similar to place the ACTUAL datatype in the label this would be amazing.

3 Comments
crossrulz
Knight of NI

Or possibly just a data type label.  Though, the context help sort of does that already.  This is an interesting idea...


GCentral
There are only two ways to tell somebody thanks: Kudos and Marked Solutions
Unofficial Forum Rules and Guidelines
"Not that we are sufficient in ourselves to claim anything as coming from us, but our sufficiency is from God" - 2 Corinthians 3:5
Intaris
Proven Zealot

I use the context help a lot, but it's different to be able to have ALL wire types visible at the same time.  Just makes debugging easier.  Especially when requirements change and you're trying to find that one wayward bit or signed/unsigned representation stopping your code from executing properly.

AristosQueue (NI)
NI Employee (retired)

At one point, I suggested that users should be able to set custom colors for certain fixed point types in the properties of their project that would be applied throughout VI diagrams loaded in that project. The wires would draw gray in the absence of such configuration, but if users wanted particular types to stand out, they could do so. It is the one time I have ever felt positively inclined toward an idea that would make the same block diagram look different on different users' machines, and the only reason I suggested it was that I couldn't think of anything better, and as a project setting, it was at least associated with the code (as opposed to just being a LabVIEW-wide setting) and thus might be distributed to the other users when the code was shared around. Even if we had a way to make custom wires for typedefs, you can't really typedef a computed type, and there wasn't any other place to associate a wire customization with a type other than on a per-LabVIEW basis, so far as I could see. I mention this here in case it inspires someone.