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What is wrong with my FIFO to SD Card Write?

Thank you in advance for taking time to look at my code. The problem is the FIFO is getting the data to the RT, but the RT FIFO is only transfering a small fraction of the elements to file. I seems to be some kind of data handling problem.

Here is a list of what is know. The list is also on the to assit you in following the process. Although, it should not be hard as this is the best practice recommended by NI.

1. The FPGA is recording sending 27 values at 50000 S/s so in a one second burst 1.35 elements are sent via the FIFO. The FPGA is working correctly.

2. During operation, the Element Remaining 1 and 2 display values that make sense.

3. The element transfer in the FIFO for reading are recorded and totaled. The value is 1.35 mil as expected. So it appears data is getting from the FPGA to the RT.

4. The array in the line from the FIFO 1.Read to the RT FIFO Write shows 27k elements per the sample size defined in the RT FIFO Setup in the Flat File.

5. THIS WERE THE PROBLEM APPEARS -- The RT FIFO Read is only transferring 27 elements.

6. The data written to file ends up being only 1350 elements. Why?

If you need additional information please ask. I have copied this content on to the, since my first attempt at a discussion post crashed.

Lloyd, S.

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Hi, here my notes:

  1. To set the FIFO timeout for -1 ms in the timed loop is not the best solution. If I were you, I would put 0 there.
    Note: Apply 0 ms for FPGA FIFO and also for RT FIFO. In RT FIFO you should also cover full FIFO error.
  2. I do not know how your FIFO is configured but it seems it is an array of SGL items.
  3. Each second there go 50kS from 27 channels from FPGA to RT. That means the number of elements in array is 50 000 * 27 = 1 350 000. So I would set the RT FIFO array number of elements to 1.35 mil.
    For the beginning I would set the RT FIFO size to 10. Could be extended if the system is not fast enough.
  4. In the recording loop I would set the timeout to 0. Then check the empty? flag.
    Recording should be executed only if the empty? is FALSE (put hte write TDMS in FALSE case).

I have one similar solution only I used queue and binary file.

Good luck,


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