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Hi, how do initial gains in pid fpga express vi differ with gains in front panel control? where should I assign pid gains achieved from tuning pid to implement pid controller on fpga target?
These should answer most of your questions regarding the differences between them. On a side note, you should not create multiple posts for the same question. If you have additional questions concerning the PID VIs after going through the material above, then please respond on this post.
What specifically do you not understand? Also, the VI you attached has a lot of dependencies and missing SubVIs which makes it difficult to troubleshoot.