Adapting signals to FPGA Resampling VI

[dnowicki]

Hello! I'm using  cRIO-9074, NI 9225 <+/-,24,10> and NI 9239 <+/-.24.5> and EPS  to measure some signals. I'm normalizing the signals to <+/-,24,1> and pass to FPGA Resampling VI according to help and this white paper http://www.ni.com/white-paper/52519/en/ but I'm having a trouble with converts it back from the output of resampling.vi to appropriate values. I don't undestand what is going on in Data Communication Loop from the example (a piece of code with feedback node and why there's two write to DMA FIFO method):

and how shoud I adapt and simplify this code to my application with 6 channels (3 from NI9225 and 3 from NI 9239).

Thanks in advance for Your help.

[ThreeLions]

Hi,

1. why there's two write to DMA FIFO method

The left FIFO stores frequencies and the right FIFO stores data.

2. a piece of code with feedback node

In this example, there are most 7 voltage or current signals (Mod1/AI0--AI2, Mod2/AI0--AI3) be acquired in the Data Acquisition Loop.

So every 7 data from the VI::Resampled Signalswere FIFO can be viewed as a group. And the frequency of each group is same. When a new group arrives, the frequency can be stored into the left AI FIFO.

3. how shoud I adapt and simplify this code to my application with 6 channels 

Change the number of channels, reference channel index settings and wiring in front panel.

Change the Data Rate to match your modules in block diagram.

Thanks!

[dnowicki]

ThreeLions thanks for your reply.

Can you tell me also how shoud I set up bit precission and types conversion to write signals to the last FIFO in Data Communication Loop in the same type and precission as I read from modules in Data Acquisition Loop (in Volts). Resample VI output is FXP <+/-,32,3> so can I convert it directly to <+/-,32,12> for NI 9225 and to <+/-,32,7> for NI 9239? What about frequency?

[dnowicki]

I forgot to ask one more question. I have 3 acquisition channels so reference channel index can be a constant or it should be a variable? 'output valid?' output from FPGA Resampling VI is FALSE all the time in my case (I'm attaching screenshot)

[ThreeLions · Accepted solution]

Hi,

1. can I convert it directly to <+/-,32,12> for NI 9225 and to <+/-,32,7> for NI 9239? What about frequency?

In theory, it could do. You can assign the fixed-point type of To Fixed-Point to <+/-,32,XX>. Then use the case structure to choose the different fixed-point type for NI 9225 and NI 9239. It is same as frequency.

2. reference channel index can be a constant or it should be a variable?

The reference channel index is calculated by fpga_Channel Switch.vi. I don't think it can be changed to a constant.

3. output from FPGA Resampling VI is FALSE all the time in my case

How do you know the output invalid is false all the time? If you just observe it by eyes, I suppose you cannot find any changes due to the loop time is so quick. Creating an array to indocate all values is a typical choice.

Thanks!

[dnowicki]

How do you know the output invalid is false all the time?

I executed this VI on dev computer with simulated I/O and performed highlight execution. 

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[dnowicki]

I've compiled this VI and ran on FPGA and it's working now. On Dev Computer it doesn't work but anyway ThreeLions thank you very much that you've explained me some details.