Lv 1.1, USRP 14.5.1, 2950R, DSP Overflow using the Single-Device Streaming Example

[EtuelDue]

Hello.

I am using the LabVIEW CSDS 1.1 and the USRP Driver 14.5.1 with the USRP-2950 Device. Recently I tried to use the RX-Host interface of the "PC USRP RIO 40 MHz BW Single-Device Streaming"-Example. Although the USRP device is connected to the PC via the MXIe-Card I get a DSP overflow error (continuous mode). In my opinion there should not be a DSP overflow for the choosen Bandwidth and Sample Rate (examples in screenshot).

Does anyone else get this error or do I have to contact the NI support? I already overwrote the FPGA Image with the "NI-SURP Configuration Utility".

Thanks and Regards

[Ben_Co]

Hi there EtuelDue! 

The DSP error that you're seeing is occurring comes from the the IQ Data Overflows reading a value greater than 0.  This occurs when the I and Q values exceed 16 bits after the FPGA does the Fractional Decimator, and then have to be coerced to a U32 overflow bits.  When you are seeing this error, I would try to adjust your Reference Levels on the front panel to see if you can prevent this from occurring. 

Additionally, what sort of hardware do you have connected to the USRP? Are you connecting an antenna, or doing a loopback? If you are performing a loopback, ensure that you have the attenuator connected, or you will be providing excessive power to the input of your Rx.

Finally, if there is a sweet spot of Sample Rate and Number of Samples that doesn't throw this error with your device, please post that as well. Let us know if any of those steps provide forward progress! 

BeenCoughin

[EtuelDue]

Hello BeenCoughin,

thank your for your time.

I am not in the office at the moment so I will try to answer as many questions as possible.

When you are seeing this error, I would try to adjust your Reference Levels on the front panel to see if you can prevent this from occurring.

As you can see from the screenshot the Refrence Level was always set to 0dBm. I also tested this with 10dBm but this didn't change anything.

Additionally, what sort of hardware do you have connected to the USRP? Are you connecting an antenna, or doing a loopback? If you are performing a loopback, ensure that you have the attenuator connected, or you will be providing excessive power to the input of your Rx.

I have an antenna connected. Disconnecting the antenna will also not remove the error. As I am using the given Project from the CommSuite there shouldn't be any loopbacks.

Finally, if there is a sweet spot of Sample Rate and Number of Samples that doesn't throw this error with your device, please post that as well. Let us know if any of those steps provide forward progress! 

I tested some different BW's and sample rates.

The only thing that removes the error is enabeling both RX0 and RX1 channel. Using only one channel (RX0 or RX1) will end in the error. For me this seems to be a software problem.

[tcap]

Hello EtuelDue,

The DSP Overflow Error is generated in the Check Stream Status VI. This occurs if the FPGA Front Panel "RX0/RX1.number of IQ data overflows" is greater than 0.

If we open the Streaming Xcvr (FPGA).gvi, we can can take a look how the "overflows" are calculated. This is located in the DDC. The DDC is comprised of 3 stages, the IQ Impairment correction, a Digital Frequency Shift, and a Fractional Decimator. Each of these stages involves a large amount of additions and multiplications. At every stage, the bit representations are monitored to see if it exceeds the 18 bit fixed point representation. If it does, data is lost and and this is recorded as an "overflow."

Most of the gains are configured automatically using the reference level. If you change the level, you might be able to resolve the overflow.

Can you please try to recreate the issue in a new project or on another computer/USRP RIO?

Regards,

[EtuelDue]

Hello Thomas C.

thank you for your information. What is the lowest value I can input for the reference level? From the Streaming Project I would assume that the value would be 0dBm and should not cause any overflow. Is it possible that I have to calibrate the refrence levels again?

I will check your hints as soon as I'm back at my workstation.

Regards

[tcap]

Hello,

I would try 30 and -30 and see if either works.

Can you also please test to see if difference frequencies operate correctly?

Do you have another USRP RIO that you can test with?

Regards,

[brooksprumo]

 EtuelDue,

Can you run <LabVIEW>\vi.lib\LabVIEW Targets\FPGA\USRP\niusrprio_tools.llb\Level Ranges.vi and post an image of the graph it displys? I wonder if maybe the Correction Data stored on the device is incorrect... This VI will plot the reference level range of the device for a range of frequencies.

[EtuelDue]

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@brooksprumo wrote:

 EtuelDue,

Can you run <LabVIEW>\vi.lib\LabVIEW Targets\FPGA\USRP\niusrprio_tools.llb\Level Ranges.vi and post an image of the graph it displys? I wonder if maybe the Correction Data stored on the device is incorrect... This VI will plot the reference level range of the device for a range of frequencies.

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I can't find the the path you described? When are these file installed? As written in my title I installed the LabVIEW CommSuite 1.1 and the USRP Driver 14.5.1.

[EtuelDue]

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@tcap wrote:

Hello,

I would try 30 and -30 and see if either works.

Can you also please test to see if difference frequencies operate correctly?

Do you have another USRP RIO that you can test with?

Regards,

---

I will do these tests on monday as I will have another USRP RIO device avaible. So far changes the PC or changing the reference level did not result in an errorfree reception.

[brooksprumo]

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@EtuelDue wrote:

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@brooksprumo wrote:

 EtuelDue,

Can you run <LabVIEW>\vi.lib\LabVIEW Targets\FPGA\USRP\niusrprio_tools.llb\Level Ranges.vi and post an image of the graph it displys? I wonder if maybe the Correction Data stored on the device is incorrect... This VI will plot the reference level range of the device for a range of frequencies.

---

I can't find the the path you described? When are these file installed? As written in my title I installed the LabVIEW CommSuite 1.1 and the USRP Driver 14.5.1.

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Ah ok. Then The Comms 1.1 path is <LabVIEW>\Resources\vi.lib\Native\Level Ranges.gvi. You'll have to open the block diagram and reconfigure the FPGA Open Node to provide it a bitfile (which you can use any bitfile from any USRP RIO project) to get it to run.