High-Speed Digitizers

Showing results for 
Search instead for 
Did you mean: 

Stream Data from digitizer (4462) to FPGA (7852R) through PXI chassis (1044)


I would like to stream data from a digitizer (PXI-4462) directly to an FPGA (PXI-7852R) at a rate of around 100 kHz. Both devices are installed in a PXI chassis (PXI-1044).


I have looked in to Peer to Peer (P2P) streaming, but none of the hardware listed above is documented as P2P compatible. 

See: http://www.ni.com/white-paper/10801/en/


How can one accomplish the equivalent of P2P streaming with the equipment listed above?


The manual for the digitizer says "FIFO size ----------------- 2,047 samples" and "Data transfers------------ Direct Memory Access (DMA)". 

see page 2 of this document: http://www.ni.com/pdf/manuals/373770j.pdf


How do I set up this DMA FIFO so that the FPGA can read from it?








0 Kudos
Message 1 of 4

Hi atomtrainers,


Good question!  Given your hardware, it's going to be very difficult to reduce the latency associated with the data transfer to the range of P2P (2 - 4 μs).  Regarding the memory onboard the 4462, that memory exists for buffered sampling between the digitizer and the controller, so we can't directly access that from other modules without making a pit stop at the controller first, enqueueing the digitizer's acquisition, and then writing that to the FPGA onboard the 7852R (related FPGA Module Help Documentation here).  This White Paper covers streaming to disk using queues, a process that isn't much different than streaming to the FPGA from the controller.  


100kHz would likely be possible, but depends heavily on which controller you are using in the system.  That said, we'll see significantly higher latency when going through the controller.  What are your latency requirements?  



Matt | NI Systems Engineering
Message 2 of 4

Thanks for your reply Matt!


My controller is PXI-8101. 


I think I could get away with a latency on the order of 100 usec. The data will be used in a feedback (PID) controller with a time constant near 0.1 sec. 


Based on your recommendations, it sounds like I need to write a Host vi that acquires data from the digitzer and then sends the data to the FPGA. Is that correct?


I am surprised that there isnt a way to stream directly into the FPGA...but I suppose that is why they came up with P2P. 



0 Kudos
Message 3 of 4

No problem!  Code-wise, you're on point - you'll need a host VI that acquires from the 4462 and puts that data into a DMA FIFO scoped to the FPGA card.  


Regarding latency, you'll have to experiment and see what kind of results you get since it will vary a bit from controller to controller.  I am curious to see what kind of results you achieve.


There are pretty significant hardware changes necessary to enable P2P - it relies on the PCI express architecture and different routing of physical channels in the backplane.  It's pretty cool stuff!  As a brief aside:  If you wanted to emulate the performance of P2P in a PXI chassis, you would have to get a FlexRIO card in the PXI form factor (one of these) and a digitizer adapter module that attaches to the front of FlexRIO card (one of these).  That system architecture allows you to route a signal directly from the digitizer to the FPGA and bypass software completely.  

Matt | NI Systems Engineering
Message 4 of 4