Power down one bank to archive a better battery performance?

[jiangliang]

Dear all:

My application need me to close as much unused peripheral devices as possible, to make battery life longer, I know many device nowadays have a powendown/sleep mode, but there are some device don't have such input, I will have to powerdown the dcdc for such device. since I need to downdown the DCDC, what will happen with the SOM?

Let's say I have two 3.3V PS for bank0,1 and a 2.5V for bank 2, and a 1.8V for bank3, I'm wondering if I can simplly cut the powersupple that supplis one bank, say bank 2, can I simply put down 2.5V power supply? Would that lead to problems? Thanks~

[Deagle]

Jiangliang,

Unused I/O banks still must be powered. You can see the minimum voltage requirements for each voltage level in the specifications document. Xilinx also speaks to this in AR 11906 and states, "leaving the VCCO pins of unused I/O banks floating reduces the level of ESD protection on these pins and the I/O pins in the bank and is generally not recommended."

Bryan