MEM usage in FPGA 2014

[MrJackHamilton]

I am looking at the 'Mem' data method which appears to be new to FPGA 2014. As there are no examples, I need help with some errors then trying to read the mem on the RT side.

I've started with the "sbRIO-9651 Read On-Board Temperatures" project and added a "U8 Mem" which I would like to pass a value from the FPGA side and Read on the RT side.

I've create a Mem that is U8 data type; Block Memory;

This code throws a "Can't find..." error on the RT side.

The FPGA Side of the code.

The RT Side of the CODE

I  get the following error when I attempt to run the RT VI:

Deploying nirvimemoryEmulationManagerCache.vinirvimemoryEmulationManagerCache.vi loaded with errors on the target and was closed.

LabVIEW:  (Hex 0x627) The function name for the LabVIEW:FpgaSdkMemoryEmulationWriteAddress:C           node cannot be found in the library. To correct this error, right-click the Call Library Function Node and select Configure from the shortcut menu. Then choose the correct function name.

LabVIEW:  (Hex 0x627) The function name for the LabVIEW:FpgaSdkMemoryEmulationReadAddress:C           node cannot be found in the library. To correct this error, right-click the Call Library Function Node and select Configure from the shortcut menu. Then choose the correct function name.

I am not sure how or why the compiler can't 'find' the code....

[tannerite]

Hi Jack,

The Memory Item should only be available to exclusively to LabVIEW FPGA. If you want access to the Memory Item from LabVIEW RT you must either pipe the data through a DMA FIFO or through front-panel I/O.

When is concerning here is that you were able to place the Memory item on a LabVIEW RT VI and it not break the run arrow.

I will file a CAR on the not breaking the run arrow when an unsupported item is placed on the RT diagram, but you will need to use the DMA FIFOs or FPGA front-panel I/O to indirectly interface with the FPGA Memory for LabVIEW RT.

- Tanner

[MrJackHamilton]

Tanner,

Thanks...

[MrJackHamilton]

Tanner,

I can also do this... Drag a FIFO from the Project FIFO tree onto an RT vi diagram and NOT get a broken arrow. Please detail this behavior in the CAR also.

Regards

Jack Hamilton

PS: If it's not been said, I deeply appreciate yours and Spex's quick response and support!.

[tannerite]

Jack,

Yeah, I will try other FPGA-specific items and document the CAR to the LabVIEW FPGA software team. I will post the CAR number shortly.

- Tanner

[tannerite]

Hi Jack,

Pretty much all of the FPGA-specific elements that only show up beneath the FPGA Target in the LabVIEW Project do not break the run arrow when drag-and-dropped to a non-LabVIEW FPGA block diagram. I have filed a CAR, 524309 to the LabVIEW FPGA team to address.

Thanks for finding this inconsistency and I apologize for the inconvenience and time this has caused.

- Tanner