My company is currently using the 9684 RMC card for one of our products. For our next board revision we will need to add ~80Mbps fiber-optic transceivers to enable fast board-to-board communications. We are going to pursue a source-synchronous transfer (clock and data transmitted from one board to another using separate fiber cables) so we don't have to do clock recovery within the 9607, but to make this work we have to import an external clock signal through the 9684 RMC card.
I think the typical way to do this is to build a socketed CLIP that declares a pin as an external clock.
However it is my understanding that we can't use a socketed CLIP and the 9684 (RMC) at the same time. The 9684 does break out 32 raw I/O lines with series terminators, and I would like to declare one of these lines as a clock signal that can be used in conjunction with an SCTL to clock in synchronously sampled data from the fiber data line.
The alternative is to oversample these DIO lines using the top level FPGA clock, but this would severely limit our data rate below 80Mbps (typically we run our top level at 80MHz, so an 8x oversample would only allow us to achieve 10Mbps which is too slow).
Is there any way to declare one of the LVTTL lines on the 9684 as an external clock?