This example uses NI-RFSA and NI-RFSG instrument driver FPGA extensions, to level the output of an RF power amplifier by iteratively measuring its output power and adjusting the supplied stimulus. These measurements and adjustments are performed continuously, as opposed to traditional techniques which make these measurements and adjustments in series, with significant latency between each. The parallel leveling in this IP is able to achieve much faster performance than traditional methods, placing the power amplifier into a known state so that subsequent measurements can be performed, decreasing overall test time.
For more information regarding FPGA instrument driver extensions, or to regiseter for access to the default NI-RFSA/NI-RFSG VST personality, please visit An Introduction to Instrument Driver FPGA Extensions.
Latest Version
Note: In this case, the VI Package version number refers to the version of NI-RFSA/NI-RFSG that was used to build the custom FPGA personality. For LabVIEW compatibility, see below.
Software Requirements
Hardware Requirements
Dependencies
*These IP components will be automatically resolved when installing the latest version of the example.
Previous Versions
Note: All source on this community is distributed using VI Package Manager (VIPM). For more details on VIPM, please read A Note on VI Package Manager