Examples and IP for Software-Designed Instruments and NI FlexRIO

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NI JTAG Host Example for the PXIe-5644/45R

JTAG.png

NI JTAG Host Example for the PXIe-5644/45R »

 

This example uses NI-RFSA and NI-RFSG instrument driver FPGA extensions, along with JTAG standard signal commands for use in boundary scan testing of ICs and printed circuit boards.

 

 

 

 

Description: This example uses NI-RFSA and NI-RFSG instrument driver FPGA extensions, along with JTAG standard signal commands for use in boundary scan testing of ICs and printed circuit boards. This example allows the user to send through the TDI an instruction or data word of any length. It also allows the user to send an instruction or data in any order. The user is responsible for parsing the input data. The example allows the user to select which state to default to after a successful shift and control the clk speed of TCK within the range of 1KHz to 10 MHz

 

 

Additional Documentation:

 

  • After installation - C:\Program Files (x86)\National Instruments\LabVIEW 2012\examples\NI JTAG Host Example for the PXIe-5644-45R\documentation\NI JTAG Host Example for the PXIe-5644-45R.pdf

 

Compatibility:

 

This example was designed and tested using the following software packages:

 

  • LabVIEW 2012
  • NI-RFSA 2.7 
  • NI-RFSG 2.9

 

 

Dependencies:

 

  • none

 

Latest Version:

 

 

Previous Versions:

 

  • none available

 

Installation Notes:

 

After installing a VI package containing an instrument driver FPGA extensions host example, before opening any of the host VIs, move the sub-directories installed under the example parent directory into c:\Program Files\National Instruments\NI VST\Custom Bitfiles\ (32-bit Windows) or c:\Program Files (x86)\National Instruments\NI VST\Custom Bitfiles\ (64-bit Windows). The Custom Bitfiles directory may require manual creation, and this process requires administrative privileges. After moving these files, c:\Program Files[ (x86)]\National Instruments\NI VST\Custom Bitfiles\[Sub-directory Name]\Open FPGA Session.vi" should be a valid file path.

 

 

Note: All source on this community is distributed using VI Package Manager (VIPM). For more details on VIPM, please read A Note on VI Package Manager