The example projects attached to this document provide Aurora 8B/10B connectivity with framing on different NI High Speed Serial instruments, using four lanes per port and a Lane Width of 2 bytes. The attached projects were created from the Aurora Pattern Controller (6592R) and Aurora Simple Streaming (6592R) sample projects shipping with the NI LabVIEW 2016 Instrument Design Libraries for High Speed Serial Instruments 16.1.
Hardware and Software Requirements
The following modules are supported:
LabVIEW 2016 SP1 (32-bit)
LabVIEW FPGA 2016
NI LabVIEW 2016 Instrument Design Libraries for High Speed Serial Instruments 16.1
The attached example projects are using the following Aurora 8B/10B configuration options:
Lane Width (Bytes): 2
Line Rate (Gbps): 3.125
Dataflow Mode: Duplex
Flow Control: None
Little Endian Support: Enabled
NOTE: For each example the comments in the top-level VHDL file for the IO Socket CLIP (Aurora_8b10b_*.vhd) also describe the Aurora 8B/10B core configuration options used, and contains instructions on how to modify the CLIP to support a different Aurora 8B/10B core configuration.
The Aurora 8B/10B core version used: 11.0 (included with the Vivado 2015.4 design tools).
Each example implements one independent Aurora core per device port, on each port available on the device. The FPGA part of the shipping sample projects were modified to support the reading and writing of an AXI4-Stream using a data type matching the size of the Aurora core data inputs/outputs, and to support framing. The Host part was also modified accordingly. In case of the Simple Streaming example the acquisition of the received data always starts on a frame boundary.
Additional Information or References
Each of the attached zip files contains both the Pattern Controller and the Simple Streaming example projects for the corresponding instrument. For more information refer to the documentation included in the projects.