Aurora 64b/66b Streaming Example for the PXIe-7915/Ultrascale FlexRIO

[Case_in_Point]

Overview

This example program implements Aurora 64b66b streaming through the Nanopitch connector and MGTs on Ultrascale FlexRIO instruments such as the PXIe-7915 FlexRIO Coprocessor. This includes an example socketed CLIP for the Ultrascale FlexRIO MGT socket, which can be built upon for other applications utilizing the Ultrascale FlexRIO MGT or Nanopitch connector for high-speed serial data communication. The Aurora streaming implementation in this example is also compatible with the Aurora implementation used in the NI Streaming 5840 Host example available through VI Package Manager.

Description

This example implements a single four lane wide Aurora 64b/66b core on the MGT of a PXIe-7915 FlexRIO Coprocessor. The project contains 3 top-level host VIs:

• Ultrascale Aurora Stream - Transceiver (Host).vi
• Ultrascale Aurora Stream - Transmit (Host).vi
• Ultrascale Aurora Stream - Receive (Host).vi

and one top-level FPGA VI:

• Ultrascale Stream Controller (FPGA).vi

The example implements an AXI4-Lite streaming interface to communicate between the LV FPGA block diagram and the Aurora core in the socketed CLIP. The example includes the capability to generate several test patterns: a ramp signal, count up, count down or PRBS. It also demonstrates generating IQ data of an arbitrary rate and frequency on the FPGA meant to be consumed by a PXIe-5840 VST along with the NI Streaming 5840 Host example. 

Hardware and Software Requirements

• NI PXIe-7915 FlexRIO Coprocessor
  • Running any of the examples in loopback configuration will require a Nano-Pitch wrapback assembly of some sort to connect the Tx and Rx Aurora streams. Otherwise a second PXIe-7915 or other module with a compatible Nano-Pitch interface is required such as a PXIe-5840, PXIe-5764, etc.
• LabVIEW 2018 or later
• LabVIEW FPGA Module 2018 or later
• FlexRIO 18.1 or later

Steps to Implement or Execute Code

This example includes a pre-compiled bitfile for the PXIe-7915 coprocessor. All host VIs are configured to use this pre-compiled bitfile so the example can be run without any compilation required. If running the example along with the NI Streaming 5840 Host example, use a Nano-Pitch cable to connect the PXIe-7915 and PXIe-5840. The 5840 project includes several host VIs that implement Aurora streaming which are compatible with this example's implementation, e.g. if using the Aurora Receive to RFSG host VI, the PXIe-7915 should transmit data via Aurora. 

Additional Information or References

For further details on the Aurora protocol, refer to the Xilinx Aurora 64B/66B LogiCORE IP Product Guide. This .xci file used to configure the Aurora IP cores in this example is also now attached as a second .zip file to enable users to customize the Aurora configuration more easily. Any changes to the Aurora IP would also potentially require re-interfacing the IP with the existing CLIP and LabVIEW FPGA.

[Terry_ALE]

I tried running this example code and the MGTs are not configured before the specific timeout.  Config Complete (Boolean) on FPGA never goes true.  I am able to run the 7915 getting started (DMA mode) with no issue.  Any suggestions or questions?

[Terry_ALE]

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I tried running this example code and the MGTs are not configured before the specific timeout.  Config Complete (Boolean) on FPGA never goes true.  I am able to run the 7915 getting started (DMA mode) with no issue.  Any suggestions or questions?

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I was able to get this working only if a matching example (on the other end of the MGT cable) was running before the timeout (5 sec) would expire; in my case the 5840 Streaming Host example.  Would be good to note this in the documentation of this example.

Added a page for the 5840 Streaming Host Example: https://forums.ni.com/t5/Examples-and-IP-for-Software/NI-Streaming-5840-Host-example/ta-p/3970841

[Terry_ALE]

Opening this in 64-bit LabVIEW and modify/recompile the FPGA VI required me to recreate the target, move files/resources to the new target, and reconnect to the CLIP XML file.  Maybe it is better to deliver this via VIPM?

[B_Sherm]

"I tried running this example code and the MGTs are not configured before the specific timeout.  Config Complete (Boolean) on FPGA never goes true.  I am able to run the 7915 getting started (DMA mode) with no issue.

I was able to get this working only if a matching example (on the other end of the MGT cable) was running before the timeout (5 sec) would expire; in my case the 5840 Streaming Host example.  Would be good to note this in the documentation of this example."

My perspective is this is expected. I have not dug into the CLIP, but it appears the "Config Complete" will not go high unless there is an MGT on the other end to establish a connection with. That is why you were able to get a 5840 and 7915 to communicate. Typically I make my own function that checks for timeouts and channel up so I have a little more control.

"Opening this in 64-bit LabVIEW and modify/recompile the FPGA VI required me to recreate the target, move files/resources to the new target, and reconnect to the CLIP XML file."

There is no need to recreate the target. Just follow the steps in this KB. I already submitted feedback to update the KB. 

https://knowledge.ni.com/KnowledgeArticleDetails?id=kA00Z0000015AEvSAM&l=en-US

[Terry_ALE]

I have used the info in the above link to correct an issue with a FAM.  Tried to follow the KB for the 7915 and I was not able to get it working.  After spending some time I just made a new target.