Single Pulse or Finite Train Generation

[Chris_Garratt_NIUK]

Overview
The example demonstrates how to generate a single pulse or finite pulse train

Description:
This VI is for generating either a single pulse from a counter source or a finite pulse train that repeats. The VI uses a state machine architecture and repeatedly stops and starts the pulse train task. You can set the frequency, duty cycle and time to wait between pulse trains via front panel controls.

Steps to implement or execute code
To implement this example:

1. Define the counter to be used
2. (optional) Set the rest of the parameters as needed
3. Run the VI
4. (Optional) Turn on the Highlight Execution to see the flow of the VI

To execute this example:

1. Install the required software.
2. Connect the DAQ hardware that supports the Counter Output features
3. Confirm the connection with the MAX with TestPanel
4. Open the VI and refer the Implement Steps

Requirements
Software
LabVIEW 2012 or compatible
NI-DAQmx 16.0 or compatible

Hardware
cDAQ with C series Counter Output Module

**This document has been updated to meet the current required format for the NI Code Exchange.**

[Daveadz]

Thanks for this vi. I have been trying to simulate a clk signal for an SSI encoder and this does the trick nicely 🙂

[Chris_Garratt_NIUK]

No problem Daveadz, I'm glad someone found it useful!

[Daveadz]

Hi Chris,

I have ‘tweaked’ your original vi to suit what I feel are my needs, but I am experiencing a minor issue.

Occasionally the signal does not appear on the output (PFI28 I’m using).

I have tried putting an 'initialise device' step in prior to using the task but it still does not appear consistently.

Can you advise?

Thanks,

David.