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Pre/Post Trigger Example for NI FlexRIO board with DRAM Memory

Overview

    This example shows how to implement Pre-/Post Trigger  on a FlexRIO board with DRAM memory. In this case study a NI 7966R with NI 5731 was used.

 

Description

     The DRAM memory is divided in two ring buffer (2x 256 MB = 2x 16777216 Samples).

     The maximum number of samples for Pre- and Post-Trigger are in sum 16777216.

     The buffer are written alternately.

 

Requirements
    Software
        LabVIEW 2012 (or compatible)
        LabVIEW FPGA
    Hardware
        NI 7966R

        NI 5731

 

Additional Information or References

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 **This document has been updated to meet the current required format for the NI Code Exchange.**