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Active Technologies AT 1120 Getting Started Example

Overview
 The following example demonstrates how to generate analog data using the AT 1120.


Description
This example shows how to continuously generate analog output data from the AT 1120 adapter module. It allows the user to enable each channel individually as well as dynamically modify the output waveform. This VI is compiled for all FPGA targets by default.


Requirements

Software:

  1. LabVIEW 2012 (or compatible)
  2. LabVIEW FPGA 2012 (or compatible)
  3. NI RIO 12.0 (or compatible)
  4. CLIP for the AT 1120


Steps to Implement or Execute Code

  1. Open a session to the FPGA VI and run the VI.
  2. Wait for the adapter module to load its default configuration.
  3. (a) The AO Waveforms are configured and (b) outputs are enabled/disabled.
  4. Reset the FPGA Memory address counter to 0.
  5. Set the counter limit for the deserialization algorithm on the FPGA.
  6. Send the waveforms to the FPGA through DMA FIFOs.
  7. Reset Front Panel Controls/Indicators
  8. Close the FPGA VI reference and display any errors.

 

Additional Information or References
VI Snippet

111111.png

 

 **This document has been updated to meet the current required format for the NI Code Exchange.**

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Ben Sisney
FlexRIO V&V Engineer
National Instruments
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Comments
o.fujioka
NI Employee

Hi, thanks for this example code to get started with AT module.

Just running this example, I get error -304003 from time to time at the very beginning.

It seems that this error is related to initialization of AT adapter module.

AT error 304003.png

  It is found that, in AT's code, there is a subVI called "SerialRead.vi" (........\AT 1212 - Getting Started.zip\AT 1212 - Getting Started\EEPROM\SerialRead.vi ). That VI doesn't properly handle dataflow (or error handling) and as a result there is a potential race condition between two VIs that does a part of initializaion process.

image 01.png

  I forced data flow between the VIs, then, the error stops occuring.

image 02.png

Thanks!

Osamu