Example Code

High speed digital quadrature with error detection

Products and Environment

This section reflects the products and operating system used to create the example.

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    Software

  • LabVIEW FPGA Module

Code and Documents

Attachment

Description

Overview

We needed digital quadrature counter to keep track of a high speed 20 nano-meter encoder.  Our system is a cRIO-9074 using a Ni-9411 differential module. All the examples found would miss counts or did not include error detection for missed encoder counts.  A state machine was used here to detect if a quadrature states were skipped. 

 

QuadDecodeStateMachine.pngstate machine.png

 

Description

I am quite new to LabVIEW and neglected to follow LabVIEW data flow rules by putting this sub.vi loop inside a while loop on the main vi.  This vi would run beautifully on its own but was not passing information to the main loop as this loop is meant to run infinitely to never miss counts.  Ultimately I decided to move the entire SCTL to the main loop.  However, using global variables inside the SCTL would make the main code cleaner and the example attached uses global variables to pass data in/out of the SCTL.

 

This code was pieced together from other encoder example and digital filter examples.  I'm open to other suggestions and tips and don't pretend to be an expert with LabVIEW FPGA after a few weeks of use.


FPGA Digital Debounce Filter Reference Example: http://www.ni.com/example/31251/en/

Quadrature encoder Velocity and Acceleration Estimation with CompactRIO and LabVIEW FPGA: http://www.ni.com/white-paper/3921/en/

Inputs:

  • Polarity- flips count direction.
  • A- Quad signal A (Replace with your encoder digital input directly)
  • B- Quad signal B (Replace with your encoder digital input directly)
  • Z- Quad signal zero reference (Replace with your encoder digital input directly)
  • Cycles of digital Filter- Delays and filters inputs A,B and Z by the number specified.
  • Reset Position- Sets "Position" to 0 and resets "ERROR" to false.
  • Enable Zero Ref- If "Enable Zero Ref" and
  • Velocity Interval (uSec)- Time interval to evaluate velocity

 

Outputs:

  • ERROR- True if an encoder state is skipped.
  • Position- Position counter
  • Acceleration- Encoder counts / time interval^2
  • Velocity- Encoder counts / time interval

 

 

Steps to Implement or Execute Code

  1. Replace A,B and Z with the FPGA I/O node directly into the SCTL.

 

 

 

 

 

Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.