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This example demonstrates how to use DMA FIFOs to send data to and from an FPGA target (bidirectional data transfer).
This project is configured to work with a PXI-7841R on a Windows computer, but this same code will work on any FPGA target and a Windows or a Real-Time Host. This example generates a user defined waveform and sends it down to the FPGA using a Host to Target scoped FIFO. The FPGA then sends it right back up to the Host VI using a Target to Host scoped FIFO. In a real application you would want to process data in between, or just use one FIFO for input OR output.
For more general info on using DMA FIFO's check out this link: Creating FIFOs in FPGA VIs (FPGA Module)
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**The code for this example has been edited to meet the new Community Example Style Guidelines. The edited copy is marked with the text ‘NIVerified’. Read here for more information about the new Example Guidelines and Community Platform.**
Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.