This sample project contains four host VIs for streaming GPS data and one FPGA VI that runs on the FPGA of the NI PXIe-5644R. Each host VI configures the GPS settings, configures the RF output hardware, and sets up a data stream between the host VI and the NI 5644R.
Streaming GPS I/Q data from the host to RF OUT works in the following way:
Streaming uses DMA channels. One DMA channel streams data from the host to the FPGA; another streams data from the FPGA to the host. Each DMA channel consists of two FIFOs, one on the host and one on the FPGA.
The output stream uses a Start Trigger to begin generating data to RF OUT. After the stream starts, the host streams data to the FPGA until you stop the application. If the host does not write data to the FPGA quickly enough, the DMA FIFO does not have enough data to read, so the FPGA reports a buffer underflow.
The input stream uses a Start Trigger to begin streaming data acquired from RF IN. This stream can operate in the following modes:
You can view the following host VIs in the Project Explorer window by expanding My Computer:
Application Software: LabVIEW Professional Development System 2012
Driver: NI-RIO 4.1
Toolkits and Add-Ons: LabVIEW FPGA Module 2012
Hardware Group: RF
Hardware Model: PXIe-5644
The four host VIs stream GPS data. All four VIs generate GPS data and write it to the DMA FIFO in parallel by using producer-consumer loops with a queue. In the producer loop, the niGPS Create Data VI creates the GPS data in packets of interleaved I/Q data. This data then converts to U32 data and enqueues. In the consumer loop, this data dequeues and writes to the DMA FIFO in the niGPS RF Output Stream Write Stream VI. In all four VIs, the streaming DMA FIFO depth can be set. You can view the number of GPS data blocks generated, the number of blocks currently in the queue, and the number of total writes to the DMA FIFO. The array length indicator shows the number of U32 data elements in each block writing to the DMA FIFO.
If you have the LabVIEW FPGA module installed, you can open the FPGA VI by navigating to My Computer»PXIe-5644R»VST Streaming (NI PXIe-5644R) (FPGA).vi. You can modify this FPGA or create one as needed for your application.
Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.