This example shows a simple CompactRIO application using best practices in LabVIEW NXG. It consists of 3 components - PC, RT and the FPGA. The PC application is used to send start/ stop commands to RT application using network streams. The FPGA application uses Read/Write node to read the data from IO module (9205 module) and transfers it to RT application via DMA FIFO. The RT application receives the data from DMA in a time loop (since DMA is a time critical operation) and then transfers it to the PC application for display. The RT application has the FPGA interface APIs, RT FIFO to transfer Data between loops, network streams APIs etc.
How to Use
The project is divided into question and solution. Open the question folder and applications. Fill in the VIs with missing APIs. Build your FPGA application.
Once the compactRIO hardware and the module is set up, connect to it in the design view. Follow the instructions on the VI to run the application.
Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.