correcting one-sample jitter in the PXI-4498

[mpelc]

I have a PXI system with:

*two arb. func. generators (FGens) (PXI-5421)

*high speed digitizer (PXI-5922) and

*DSA scope (PXI-4498),

all in 1042 chassis.  Using Labview v7.1.

FGens run at 100MHz, the 5922 at 15MHz, the 4498 at 200KHz sampling rate (basically their maximum rates).

Our measurement requires that the DAQ of both scopes and signal generation of both generators should all start at the same time.

The Fgen starts immediately (immediate trigger) as the labview app runs.  The two generators are sync'd with NiTclk (config for homogeneous triggers).  Also one of the generators triggers both scopes: it routes a trigger signal from "MARKER" to "PFI0", and both scopes are triggered on PFI0 via external cables.

This seems to work well, the only issue is that the 4498 has "one-sample jitter" (+- 5us at the near max rate of 200kHz sampling rate), and it matters in our application.  My understanding is that the "one-sample jitter" occurs because the generator creates the trigger signal and it has a faster clock than the scope, and so the trigger signal can start "in between" acquired samples of the scope.

So far we've been correcting this jitter in post-processing by "shifting" the time series fractions of a sample (interpolating).

I was trying to figure out if there's a way to do it without the signal processing.

If the 4498 could generate a trigger, it would solve the problem because it has the slowest clock in the box.  But it can't, AFAIK.

I don't think the NiTClk library supports the 4498.  I was reading about synchronizing clocks in the 449x DSA manual, but it only covers sync'ing DSA devices with each other.  I didn't find this article much help, either: http://digital.ni.com/public.nsf/allkb/AE63551CD4C4B24886256BE4004F4242

[Steven_K.]

Hi mpelc,

I wanted to clarify a few points on your system. How are you synchronizing the 4498 with the TClk devices? Are you PLLing the 4498 to the PXI_Clk10? From what device are you sending your start trigger? Also can you try varying the sample rate of the 4498 to something like 100kHz. Then measure the jitter. Is the jitter 1 clock period? (10us for the 100kHz example).

I'd like you to try synchronizing using your TClk setup to send out a sync pulse to the 4498. I've attached an image of the property nodes that should be set. The DAQmx Timing should be inline with your 4498 task and the TClk should be in line with your TClk synchronization.

 

[SKowl]

Have you tried exporting the start trigger of the 4498 to one of the PXI_Trig lines in the 1042 backplane, and using that PXI_Trig line as the Start Trigger source terminal for the generators and digitizer?

[mpelc]

I am not synchronizing the 4498 with anything.  The 4498 simply receives a start trigger from one of the generators.  This is over PFI0 (external line).

We have two function generators (Arb1 and Arb2).  Arb1 starts immediately (from labview), and sends a start trigger to the 4498.  Arb1 and Arb2 are sync'd with NiTclk.

Yes, the jitter is one clock period; if I change the sampling rate to 100KHz, it is still one sample jitter (10us for that case).

========

Perhaps you could take a look at the example (put together by another NI engineer), which I modified slightly.  If I run it once (4498 continuously acquires in a loop, the fgen sends the same square wave several times), I get no jitter.

If I run the overall vi multiple times and accumulate the results in a single graph, you can see the jitter. Note that within each run of the vi though, there is no jitter (the curves line up).

From this I am thinking that my problem might be solved if I could synchronize once, keep the devices' clocks running for my entire experiment (hours), and only then stop them.  I'm not sure how to do this.

[mpelc]

Whenever I try sending a sync pulse, I just get flat data on the scope (even if I acquire for a second), as you can see the default data in the graph in the attached vi.