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Analog output : reduce effect of quantization

I would like to reduce the "stairway" effect on a signal output (smoother signal). I use a PCI 6025E board, and the digital signal I use is sampled at 512 Hz.
I program under Builder C++ 5.0
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Hi JPD,

Unfortunately, there is no way to improve the resolution and remove the "stairway" effect on the PCI-6025E board without external circuitry. This means you would have to use an attenuator external to the board and output your signal with a higher gain to compensate for the external attenuation.

Many of the other E-Series boards do support a couple things to improve the stairway effect, including having a board with higher output resolution.

The best way to maximize your resolution without external circuitry is to use an external reference for your DAC. The board itself uses an internal reference that you can set up to be either +/-10 Volts or 0 to 10 Volts. If your signal fits well within this range, then this reference works fine. If your sig
nal range is much smaller than this range, then your resolution may not be very good. This is important because cutting your range in half improves your resolution by a factor of 2. You can use the pin "EXTREF" (check your manual to see if the board supports this) to connect your own voltage reference. The DAC will use this range to convert your signal from Digital to Analog. Effectively what you are doing is changing the range of your DAC to fit the range of your signal. In the analog input case, you are changing the range of your signal to fit the range of your ADC. Same concept...different implementation.

Anyway, I hope that helps.

Ron
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Hello --

You could certainly reduce the stairway effect if you were able to increase the output sampling rate. One way you might consider doing this would be the following:

#1) Take an FFT using the tools in the Analysis subpallette of LV.

#2) "Pad with zeros" to increase the number of points in the FFT. You might double the FFT size, for example.

#3) Than perform an inverse FFT on the padded spectrum. This will effectively increase the number of points, reducing the size of the steps. If you double the FFT size, you will double the number of time domain points.

Another possibility that could help would be to use a 4451 DSA board for output. This board uses interpolating delta-sigma outputs that actually interpolate between SW data points, r
educing the stairstep effect significantly. However, the minimum ouput rate for this board is 1250 S/s. You should use the "pad and invert" technique to increase your sampling rate by a factor of 3 or more if you would like to consider using this product.

Hope this helps!

Bryan
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