DutLUG

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Meeting 12-12-2019

De onderwerpen voor 12 december zijn:

 

 

FPGA computing acceleration for Neural Networks

Natan Biesmans - (Qplox engineering)

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FPGA’s have been used to pre- and post-process signals, meet deterministic timing constraints and to programmatically create hardware interfaces in LabVIEW. However, we only have scratched the surface. This presentation will follow the mindset of the big players like Xilinx and Intel where the CPU is offloaded and the FPGA becomes the true heart of the system. Allowing us to reach computing performances previously only available in the most powerful of systems. This presentation will discuss computing acceleration topologies, loading and changing FPGA code during runtime, CPU to FPGA communication, low level constraints and how to overcome them.

 

 

The second presentation will be announced soon!

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