11-05-2009 08:58 PM
Hi,
I am programming our own driver to operate the PCI-6601. For our application we need hardware arm option. I know it is possible to use 2 counters for that, but NI-TIO should support also hw_arm. Although it is not explained in the registry document at all, after some tedious check in the DDK examples I found that this bits are located in the Gi counting mode register. I know the position of the HW_enable as well as the position of the 3 bits for pin sellect options. What I do not know is What are the 3-bit field choices for Hw_Arm_Sel . I contacted NI support but got no support. How can NI sell boards and when a customer who is not using LAbview or Measurement Studio or DDK, but is implementing his own driver is then so arrogantly turned down from NI? Also, how can NI publish just part of the registers the board support, and when a customer contacs and asks for some registers get not at all support? I can not foretell the missing registers, and it is pretty unprofessional to document just partly the registers of 660x devices. And on request you got nothing.
I hope someone from the community know about this Hw_Arm_Sel 3 pin options. Otherwise, there is just an option of error and trial. Or simply throw the board in the garbage.
Dr. Kirco Arsov
Solved! Go to Solution.
11-06-2009 09:49 AM
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ] [ macOS ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
11-06-2009 11:10 AM
Hi Joe and thank you for your post. I look forward to more information. It is at least clear from your reply that the RTSI lines inside the board (the connector in the upper part of the board) should be used/sellected (or not? but there is no info on which line is driving what in the manuals....) or rerouted to/from the I/O connector. I do trully hope we will resolve this problem. With all time spent for simple bits we could simply programm a small CPLD or a weaker fpga for this task, but now we really want to use the board after so much time spent in this issue.
Br
Kirco
11-09-2009 04:51 PM
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ] [ macOS ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
11-11-2009 06:00 PM
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ] [ macOS ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
11-11-2009 08:30 PM
Hi Joe and many thanks!
This is the info I was looking initially. Thanks that you took your time and looked the registers info for us. We have at the moment a quick (and diry) solution which works now but not as good as we want it. Namely, we simply read the trigger signal (in our case 1PPS comming from the H.MAser) via the DIO_0 line in a software loop and as far as it changes state we software-arm the counter. This is accurate for the trigger signal within 0.1msec (which is bad for our system) so we must then use a ps event timer to correct for this offset. We do believe that with the HW_Arm we could achieve the arming accuracy within 1ns or better (we achieved that by deriving different frequencies from the H. Maser frequency with 6601 board). I will definitely try your description today as far as I get in the office. We actually for this operation use Counter 1. The terminal block and all wiring has been done in the CA-1000 and is in the rack (together with the dio-96 tb wirings) now. So the triggering signal is connected to DIO_0 pin and we want to use the counter 1 for this operation. Counter 0 is doing another thing, such as ext 10MHz counting, getting abs time synchronization from GPS, sending TC to counter 2, counter2 counts the TCs of counter 0, since 100ns rolls over very fast, so we should get a track of this not to have to read the counter once in each 7 min etc. So if we go for counter 0 as you gave us a description a lot of rewiring, dissasembling the rack work etc is needed. Can you please be so kind and give us the registry addresses for the same operation but counter 1? I will update you on the test.
Thanks again and best regards
Kirco
11-12-2009 11:49 AM
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ] [ macOS ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
11-19-2009 11:53 AM
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ] [ macOS ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
11-20-2009 07:16 AM
02-12-2010 10:30 AM
Joe,
I'd like to do this as well with one difference. I'd like to trigger with an internal source. How would I go about doing this?
Thanks Joe,
Mark Horton