There is a customer issue with the RLP programming for an interrupt between the master and slave components on the PCIe-6509. A brief discription is posted below. Is there something missing? Attached is the register map and register dump.
Below is a description of the problem:
"The problem I am having is with your new PCIe-6509 (Express) card. This has a completely different interrupt chip. Instead of using the MITE chip, this card uses the Common Host Interface Chip (CHInCh) that is common to both the Master and Slave. I am under the impression that both Master and Slave have to go through the ChInCH chip to get to the PCIe bus. The Master successfully propagates its interrupts to the PCIe bus through the CHInCh chip, however, the Slave is unable to propagate its interrupts to the CHInCh. The Slave status resister indicate that an INTERRUPT HAS OCCURRED, however, the CHInCh chip status register does not show any receipt of the interrupt and hence is not propagated to the PCIe bus. (Please refer to my previous detailed email including address offsets).
The PCIe-6509 board has two registers located on Master and Slave to enable interrupt forwarding and setting interrupt forwarding destination registers. I set both as per documentation and still no luck with the Slave.
The real strange thing is that even if I DISABLE interrupt forwarding from Master to PCIe bus, I STILL GET INTERRUPTS from the Master. Not sure why that should be the case. At one time, I thought that the documentation on the address offset for both Master and Slave were incorrect, however, when I looked at your source header files, they also indicate the same address offsets, so that may not be the problem.
If the address offsets are correct (according to NI's documentation), then the only other explanation is that the card is designed where the Master is ignoring these registers and always propagating the interrupts to the PCIe bus, while the Slave is not. If you indicate that the Slave has to go through the Master to propagate interrupts, then maybe there is another set of registers that need to be programmed that are not documented to get the Slave to work."
I'm running into the same issue when using the recommended register accesses in the reference manual. I am investigating the correct register accesses to get this functionality.