G1_MSeries_ABZ register definition

[AJJ]

What is the definition for the G0_MSeries_ABZ and G1_MSeries_ABZ registers?  I've seen in the examples for configuring the counters for quadrature encoder inputs the following:

    //Enable Input Pins
    board->G0_MSeries_ABZ.setG0_A_Select(9);  //PFI8=9,
    board->G0_MSeries_ABZ.setG0_B_Select(21); //PFI10=21
    board->G0_MSeries_ABZ.setG0_Z_Select(10); //PFI9=10
    board->G0_MSeries_ABZ.flush();

However, if I want to configure the second counter for quadrature encoder inputs as well, what value do I need to pass to setG1_A_Select(??), setG1_B_Select(??), and setG1_Z_Select(??)?

Also, I understood that you had to use PFI8 for CTR0.A, PFI10 for CTR0.B, PFI3 for CTR1.A, and PFI11 for CTR1.B -- if so then why do we even need to configure which pin to use here at all?

Thanks,
AJ

[Tom_W_[DE]]

Hi AJ-

The bitfield values for each of those inputs are determined according to this enum:

• 0: Reserved

• 1-10: PFI<0..9>

• 11-17: RTSI<0..6>

• 18: Reserved

• 19: Reserved

• 20: Star_Trig

• 21-26: PFI<10..15>

• 27: RTSI7

• 28: Reserved

• 29: Reserved

• 30: ANALOG_TRIGGER_OUT, the analog trigger circuitry output signal

• 31: Logic low

The values you listed for "default" values are the defaults used by DAQmx.  Those values are automatically written to the ABZ bitfields when the board is configured by DAQmx.  The same settings need to be made manually when you are configuring and initializing the board in your own driver.

Hopefully this helps-