03-03-2006 10:12 AM
03-06-2006 10:17 AM
Hi DRT-
Your 6221 digital output can be clocked to provide digital outputs with hardware-timed precision. Do you need to be able to change pulse specs on the fly? This would be considerably more involved, so for the interest of discussion I'll address the case of constant frequencies.
First, there is no dedicated timing engine for the digital output hardware on the board so you will need to provide an update clock from elsewhere. The most popular choice is to use an onboard counter from the device to generate a sample clock for the digital hardware. I'm not sure which development environment you are using, but there are pulse generation examples for LabVIEW ( Help>>Find Examples ), ANSI C ( Program Files>>NI-DAQ>>Examples>>DAQmx ANSI C), or .NET ( Program Files\National Instruments\MeasurementStudioVS2003\DotNET\Examples\DAQmx ).
Once you have set up the sample clock generation you will need to configure the digital output task for hardware timing with external clock control. The "external" sample clock source will then be "/Dev1/ctr0InternalOutput" and should be supplied to the pertinent DAQmx Timing function for the digital output task you choose. Good examples would be ( Hardware Input and Output>>DAQmx>>Digital Generation>>Write Dig Chan-Ext Clk.vi ), ( \Digital\Generate Values\Write Dig Chan-Ext Clk ), or ( Digital\Generate Values\WriteDigChan_ExtClk ) for each of the aforementioned development environments.
The only challenge left is to actually generate the sample data. Your data to write should consist of appropriately padded trains of zeroes and ones to achieve the various frequencies of outputs relative to the master sample clock. This means that the sample clock rate you choose should be at least twice as fast as the rate you are trying to achieve and that you will need to pad the digital data to be written on the various other channels.
Hopefully this will help get you started- please let us know if we can offer other suggestions along the way.
03-06-2006 02:46 PM
03-06-2006 02:50 PM
Hi DRT-
Is it possible that you're trying to use DIO lines in ports 1 or 2? I meant to mention it before, but hardware-timed digital operations are only supported on port 0. If you could provide a short section of your code where you create the digital channels I'd be happy to take a look at it.
Thanks-
03-07-2006 06:23 AM
03-07-2006 09:02 AM
Hi DRT-
Can you please confirm which DAQ device you are using? If you are using a PCI-6221 the configuration code you posted should work great, but the error you're seeing seems to indicate that you are using an E Series or other board that does not support hardware-timed digital operations. Can you please check in MAX which one of your boards is referred to be "Dev1" and make sure that it is indeed a PCI-62XX (i.e. M Series) board?
Thanks a lot-
03-07-2006 09:14 AM
03-07-2006 09:29 AM
Hi Don-
Let's take a step back and take a closer look at how the channels relate to one another. Do all of the channels need to change frequency proportionally to one another or completely independently. In other words, let's look at two channels:
Channel 1: 50Hz
Channel 2: 95HZ
When you say the frequency must be changed on the fly, do you mean that Channels 1 and 2 will be changed to 100Hz and 190Hz or that they might need to be changed to 50Hz and 100Hz, respectively? The latter case is more complicated but certainly do-able.
It won't be quite as simple as just verifying states and writing new states. In order to clock out the digital values you will need to construct and write a multi-point buffer which will then be clocked out by the counter output. The easiest option would be to construct a 2-dimensional output array that consists of the smallest number of points necessary to divide all digital channels by integer numbers. So, for an example of
Channel 1: 50Hz
Channel 2: 100Hz
You will need digital patterns of
Channel 1: 1100
Channel 2: 1010
And you should output them at 400Hz. By default, the output patterns will be continuously "regenerated" from the buffer unless you intervene by writing new buffer values. The advantage of using a counter for the sample clock is that you can adjust its frequency output while the counter task is running, so you can optimize the update rate and number of digital buffer points as needed.
Hopefully this helps-
03-07-2006 10:25 AM
03-08-2006 11:18 AM
Hi DRT-
You could certainly control the lines with software logic, but you will lose the hardware-timed nature of your output operation. So, since you're programming in Windows it may be relatively unlikely that you will be able to achieve precise timing by using software decisions to update the data point-by-point "on the fly." I would definitely suggest using the hardware-timed outputs via buffer writes.
Hopefully this helps-