fpga reference to several subVIs

[Eblanco]

Hello everyone,

I'd like to know whether this is possible and/or it is something wrong with it.

My RT Target is running several inspection loops. All of them have to access FPGA I/Os (each inspection has its own I/Os) as fast as possible. My question is if I can open a FPGA reference in a top level VI at startup and pass it to all the subVI inspection loops, so each of them can read/write I/Os at its inspection rate.

If this is possible, how would you handle errors / close reference ? 

Thanks in advance.

[JK1]

Yes it is possible to pass the FPGA referance to multiple blocks and perform the RW operation on to FPGA.  You may have a function global that opens the FPGA Referance and add all the functions into the function global.  Adapting this architecture would avoid messing up the block diagram with wires running all around.

When above architecture comes in error handling lies within the scope of the Function global itself.

FPGA referance can be closed at the exit of the code or the situation has neve arised for me since the application would run until power shut down

Referance closure can be  incorporated within the Fnglobal.

Hope this helps.

Post back for queries.

[Eblanco]

Thanks for your answer. I will try it asap and let you know if everything went OK.