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cRIO rt timed loop w/ external clock trigger???

I have a feedback control system using a cRIO-9022 and an NI-9401 digital I/O module (among others). I want to use a timed-loop in my RT code to have the execution priority I require. I need to run the timed-loop from an external clock on the NI-9401 input pin. How can this be done?

 

Thanks,

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Some cRIO controllers have a trigger input on the controller (the NI cRIO-9014 for example), but the NI cRIO-9022 does not. Because of this there is no easy way for you to synchronize RT timed loops from digital inputs.

 

There may be other ways to do what you are looking for though. What type of clock are you trying to synchronize to?

Craig H. | CLA CTA CLED | Applications Engineer | NI Employee 2012-2023
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Hi WhyNot,

 

Can you elaborate on whether you are using your cRIO's Scan Interface or FPGA Interface to communicate with your 9401?  This will make a large difference on your ability to time Real-Time execution with edges coming into your 9401.  If you are using the FPGA interface, you may either consider implementing timed loops directly on your FPGA (if the code is not too large), or using a FIFO read from your 9401 on your controller to programmatically gate the execution of your loops.  The latter option will not technically be hardware timed but may achieve jitter rates on an order of magnitude of 10s-100s of microseconds depending on your code complexity.  If you are using Scan Mode, you may still programmatically gate loop execution based on 9401 inputs but latency will be significant (several milliseconds).

 

Regards,

Regards,
Chris Elliott
x36772
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Greetings Craig and Chris,

 

Thank you for the replies. The clock I am using is derived from the sensor suite (an inertial navigation system) being used. There are a fair amount of floating point calculations I will ultimately have to perform, so it appears eventually the RT processor will have to be utilized.

 

I am using the FPGA interface and ended up implementing the FIFO read between FPGA and RT.  I am seeing about a 400 microsecond jitter. At this point that amount of jitter is tolerable.

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Hi WhyNot,

 

How are you benchmarking the jitter of the system? This document discusses jitter considerations on RT systems.

 

Also, make sure not to test it in interactive mode as you will not get consistent (or correct) results.

Craig H. | CLA CTA CLED | Applications Engineer | NI Employee 2012-2023
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