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When hsdio 6552 configure for acquisition 100ns is missed out.

HI,

 

The HSdio is configured as stimulus response.

 

the on board sample clock rate is set for 20Mhz and brought out to DDC connector

The acquisition clock used is connected through DDC connector to strobe.

The trigger for acquisition used is data active event and is fed back from pf2 to pf1.

 

Below are the wave form pictures attached

 

The first clock cycle is missing in acquisition.

 

Can any one tell what can be wrong.

 

Thanks

chintan

 

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Hi Chintan,

 

What your are seeing is basically expected behavior. If you goto this link Missing the First Sample with NI-HSDIO Devices, the article will explain in much more details on why you are seeing what you are seeing.

 

Regards,

Jignesh P

Best Regards,
Jignesh Patel
Principal RF Software Engineer
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hi Jignesh,

 

Thanks for the reply. The link was very helpful to understand the timings

 

the link explains the problem below

I am generating a signal, exporting the clock and reading the signal back. I am triggering the acquisition off the data active event, and if I select to acquire my data on the same edge that it is generated, everything works as expected. However, if I generate the signal on the rising edge and acquire on the falling edge I miss the first sample.

 

It says If selected to acquire data on same edge that is generated everything work expected.

 

I think this is not the case for me.

 

Reason:

I am exporting the clock to DDC connector and feeding it back thru STROBE. Then I am using the the STROBE as sample clock to acquire my data.

 

I think due to the delay in strobe sample clock used in acquiring data I might be missing one sample. What's your opinion.

 

However if i use the On board ample clock for both generating and acquiring I do not miss the first sample. The start trigger data active is fed from pf1 into pf2

 

Thanks

chintan

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Hi jignesh,

 

One more question

 

If my sampling rate is 20Mhz. If want to delay data position How much delay i should enter.

 

I tried 25.0e6 but then it gives error saying valid vaules should begin from 0.000000 and values end at 1.000000

 

what does this means?

 

Thanks

chintan

 

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Hi Chintan,

 

I agree the delay that you see is due to bringing the clock out on DDC and then connecting the strobe.

 

The delay that you want to set is actually done as a fraction, so thats why it is between 0 to 1. You can think of this as percentage of delay as well. If you look at page 10 of the NI PXI/PCI-6551/6552 Specifications, the delay functionality is explained in more details in figure 2.

 

Regards,

Jignesh P

Best Regards,
Jignesh Patel
Principal RF Software Engineer
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