Sharing Timebase for 4 Boards

[tnek]

Hi Kevin,

I just want to make sure that your start trigger is still being shared. Even though you are sharing the timebase, they will not all start at the same time especially since you are acquiring at different rates. Your test seems legitimate and if everything worked correctly, the signals should line up in time. If this still does not work, could you post a barebones version of your code which shows the necessary functions for the synchronization? Let me know how things go.

Regards,
Kent
Applications Engineer

[digitalIO]

Thanks again for the help.

I am still sharing the start trigger.  I have set up all the tasks except the Analog Input task to use a digital start trigger with "/dev1/AIStartTrigger" as the source.  Then I start all the tasks in order with the AI task last.  I think the trigger is working. I inserted a wait period between starting the triggered tasks and the AI task just to make sure that the other tasks were in fact waiting for the trigger to start.  It seemed to be working as expected.

I'll work on getting my code into a bare bones version so I can post it. Shouldn't take too long.

Thanks,
Kevin

[digitalIO]

Ok, so I managed to piece together the relavant functions of my code.  The front panel is not well organized at all, but the block diagram should make some sense.  Let me know if you don't understand anything.

Kevin

[tnek]

Hi Kevin,

I took a look at your code and it seems fine. I could not run it since I don't have the same devices and the same configuration. Just out of curiosity, how are you measuring this time delay from the digital input to the analog input? Are you looking at the sample number and correlating that to a time or are you looking at a timestamp? The other thing I noticed was the large difference in sampling rate between the analog input and digital input. What happens when they are both set to the same sampling rate?

Regards,
Kent
Applications Engineer

[digitalIO]

Kent,

Thanks for looking at my code.  The way I'm looking at the time delay is by knowing the sampling time and assigning a time to each sample. I am doing in a post-processing block later in my code.  I was playing around with this in Matlab and I think I may have found my problem.  I am not using the actual sampling frequency from the card (obtained using a property node).  It might be that the actual sampling frequency for the digital acquisition is slightly different than what was specified.  If that were the case, I would see a small but increasing difference in the time-difference between the analog data (I use the actual acquisition frequency for the analog post-processing).  I'm going to try this tomorrow and see what kind of results I get. I've got my fingers crossed!

Thanks again,

Kevin

[digitalIO]

At last -- I think I've found the root of the problem.

After looking at the actual sample clock rate (vs. the specified sample clock rate), I found that there was a slight difference.  I was specifying 345600 and only getting 344828.  I'm not exactly sure why this was happening, but it is a big enough difference to matter when looking at sample times and such.  After using the actual sample time, I was able to observe perfect synchronization between cards using the volt box switching to 5V. I call this the external test because the volt box is external to the system.

However, the "internal" test, where I command the analog output to 5V, still shows some (smaller) synchronization errors, i.e. the digital line switches to HIGH about 50 microseconds before the analog input shows any change from 0V. I'm looking into this and I think I'll be able to find the problem, but I just wanted to let you know. 

I am noticing that the specified analog output rate is 2400 Hz but the actual rate on the card ends up being 2400.096 Hz. I have to think about it more, but this might be causing the "internal" test synchronization problems.

Thanks again for your help. I appreciate it!

Kevin

[tnek]

Hi Kevin,

You're correct in using the actual sampling rate. This can be a bit confusing but the necessary since the sample clock is divided down from a master timebase on the card. The number to divide by needs to be an integer. Here is an article with more information and a few examples showing how the actual sample rate is calculated.

Regards,
Kent
Applications Engineer