02-27-2018 12:08 AM
I am interfacing SDRAM IS45S32160F-7BLA2 with MPC8270 PowerPC Processor.
Input capacitance of SDRAM is 6pF per data line and i am using 4 SDRAM's which add upto 24pF of capacitance load.
Processor suggest to have a minimum loading of 20pF.
Now the problem is current . Processor datasheet says Ioh = -2mA and Iol = 6mA. at Voh = 2.4 and Vol = 0.4
Keeping this current in mind, i=C dV/dT fails, as 20pF of load capacitance needs around 60mA and Iol and Ioh is 2 to 6mA ,
So how this 6mA will fullfill the requirement of 60mA of load. This load is on databus of processor.
02-27-2018 02:16 PM
The current listed is for steady state in the VoL or VoH condition. The external capacitance is there for damping the ringing during transitions.
02-28-2018 04:17 AM
Ok , so is the input capacitance valid even when the CS (Chip select) of a particular bank is disabled.
I am using 4 SDRAM on 4 banks, but only 1 is active at a time so does i have to calculate input capacitance of 1 SDRAM at a time or 4 SDRAMs?