10-11-2013 12:18 PM
My PXI 6552 is aquiring signals from an external PCI board. The PCI board provides an "enable" line, a clock line, and a data line. The enable must be high for valid data. The data is read when the clock is transitioning from high to low. The enable line is at a constant rate once it occurs. The test duration can be any length of time. Both the PCI provided clock and data line are low when enable is low.
I'm believe the steps are as follows:
Put the enable line to a PFI channel and set it as a reference trigger event with edge trigger high.
Put the clock line to a different PFI channel and set it as a reference trigger event with edge trigger high.
Put the data line to a DIO channel
When the enable trigger occurs read the data whenever the clock trigger occurs
When enable trigger stops stop reading the data
Wait for the next enable trigger
Repeat
My questions are as follows: Can two PFI channels be set with triggers at the same time? Can the triggers be used together in this manner? As the enable trigger has no indicator to the user the trigger has occured, how can the data read be used in the manner described? Can a reference trigger be set to go into an idle state or does in need to be put into a loop to reoccur?
Thank you,
Chase
10-12-2013 02:50 AM
Are you trying to do I2C or SPI? You may interested to look into http://zone.ni.com/devzone/cda/epd/p/id/6080 and http://zone.ni.com/devzone/cda/epd/p/id/6163
10-15-2013 07:40 AM
I believe niether 12C nor SPI. There are not address or first or last bits defined in the way I2C and SPI use them, respectively.