Digital I/O

cancel
Showing results for 
Search instead for 
Did you mean: 

PXI-6541 HSDIO trigger setup delay

Highlighted

Hi,

I am currently using the PXI-6541 HSDIO to receive and log a data stream coming from an external device. This data stream is synchronized to the sample clock of the HSDIO which is exported on the CLK OUT channel and set to 5MHz. The data is sent in "packets", as shown below. Each packet has a start bit which is used to trigger a sampling on the HSDIO card.

 

LabviewDataStream.png

 

Below is the VI used to capture and log the data in Labview. The loop in the VI first waits for a start bit, which is indicated with a "0". Once this happens, it logs 30 samples, which are then recorded and stored in an array. The process then starts again with the trigger waiting for a new start bit.

 

LabviewDataAquisition.png

 

My problem is that the time it takes for data to be recorded and stored in the array and the trigger reset i lose several packets. For instance i might only log Packet 0 and Packet 4, while the remaining packets are lost. This is from what i can see because of the time to read the previous sample and setup the trigger again, which then the loop is timed appears to be around 0.1ms - 2ms, which is far to long when we are talking about a 20us delay between packets.

 

My question is if its possible to somehow perform this trigger setup operation faster, perhaps controlling hardware directly or some other method. Or is 20us too fast in general for Labview applications? One method would be to just read 1000 samples and then try to extract the packets afterward from this sample array, but the problem then is that i risk losing packets because they are either cut off or they are lost once a new set of samples are set to be recorded.

 

Best Regards,

Ole Kristian

 

 

0 Kudos
Message 1 of 2
(486 Views)
Highlighted

Have you tried using script triggering?

0 Kudos
Message 2 of 2
(108 Views)