NI-9403: Acheiving maximum 7us update rate

[npol2]

The NI-9403 module has an update rate of 7us, so in theory it should be able to output a clock period of 2*7us=14us or 71kHz.  I have a simple program which inverts the boolean input to a single NI-9403 channel, enclosed in a continuous while loop (no timing functions or single-cycle loops). However, I cannot get more than 38kHz out of the module.  Without disabling arbitration, is there a way to get to a higher data rate?

[adena.l]

Hi npol2, 

Why are you multiplying by 2 for the maximum update rate in your equation? The update rate is measured in S/s when outputting from a single channel.

[npol2]

A square wave requires 2 samples per period.  

I ended up reconfiguring the system to work with 9401 modules instead, which would support the required clock rate

[SSPTest]

Sounds good! 

For some more information, I noticed in the datasheet for the 9403 that the maximum update rate is only valid when the module is used in a cRIO system.In other systems, things like driver software and system latencies can impact the update rate. In your case it sounds like you are doing software timing with the boolean inside a while loop. The output is then only able to update as quickly as your while loop can iterate.