LVTTL and CMOS are two different technologies used to implement
logic. TTL is constructed using a bipolar process (BJT
transistors) whereas CMOS is the complementary MOS process. From
a digital perspective, they have very similar specifications and
characteristics so are often lumped together. However, they do
behave slightly different, mainly in how they transition between logic
states and the specific voltages that trigger that transition.
In response to your measured observation, LVTTL and CMOS devices will
specifiy the MINIMUM voltage at which the device can guarantee the
logic state to be valid HIGH. That is, you could have a device
that transitions at 1.6V, one at 1.7V, one at 1.9V but you will never
have one that requires a voltage greater than 2.0V to change logic
state. Likewise, devices are specified with a MAXIMUM voltage at
which the devices recognizes a logic LOW.
Hope that helps
-Ryan