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Implementing I2C Clock Stretching in HSDIO

Hi All,

 

I've successfully implemented I2C Read and Write using NI I2C Library for HSDIO PXIe-6556. I understand how clock stretching in I2C works, but I'm confused on implementing it for HSDIO. Any insights or suggestions will be helpful.

Thanks in advance.

-Santhosh
Semiconductor Validation & Production Test
Soliton Technologies
NI CLD, CTD
LabVIEW + TestStand + TestStand Semiconductor Module (2013 - 2020)
NI STS for Mixed signal and RF
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I'm interested in implementing I2C clock stretching as well.  It would be great to have an I2C Reference Library block that we could easily insert into our designs.  Does anyone know how to create this block on our own?  I haven't dug into the details of how the I2C Ref Lib creates the digital waveform, so I'm not sure how to do it.

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Would it be possible to add a "Non-Clocked Bit" vi into the I2C Reference Library so that it would add a clock cycle where SDA and SCL are both low?  This would provide two benefits.  

 

1.) It would make it much easier to visually see where one byte ends and the next byte starts when debugging with a scope.

2.) It could be placed before an ACK bit to provide a pseudo clock-stretch for devices that need a little extra time to ACK.

 

If someone could please provide instructions on how to modify the existing "Add Clocked Bit" block to make it a "Add Non-Clocked Bit" block, and then add it to the existing library, that would be a life saver!

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