I'm trying to set an interrupt to be activated whenever an edge reaches a specific port on the DAQ. How can I do that? Are there any IRQ functions on the API? How can I access them?
Another thing I'd like to know, but now regarding the wait functions, is the processor free while waiting?
After digging around the API, looking through the documentation, and talking to a few of my colleagues, I was unable to find anything in the DAQmx API that will give direct access to IRQ lines. The DAQmx drivers permit our cards to use IRQs and DMA channels, but the functions exposed to the programmer are a level of abstraction away from that.
It is possible to get IRQ-level access to the hardware using our Driver Development Kit .
Tell me a little more about your application, we may be able to find a way to do what you're trying to do without writing new drivers.
We are trying to use the DAQmx as a communication board, using the SPI standard. This way, every time the SS is activated, the MISO/MOSI tasks should be started and the communication begun. But we don't want poll for the SS, because that would use freeze the whole system, especially once the process is set to have a high real-time priority.
The solution we thought was to set an interruption activated by pos and neg edges of the SS signal to enable and disable the MISO/MOSI tasks. The trigger functions on the API are not being very helpful though.
Sorry, I've got more questions here than answers.
Just to make sure I understand your setup, you are using the PCI-6534 as the SPI Master? As far as control of the 6534 is concerned, are you writing the software in LabVIEW, or are you writing the DAQmx calls in C?
I'm looking at ways you might be able to do what you need using a change-detection event (and have the software do X when line Y changes state). The change detection doesn't require constant polling, but it does require that the line-state be checked every n cycles for it to be effective.
Don't worry, questions are good.
The PCI-6534 would actually be the slave. Also because of that the SS (slave selector) should enable/disable it.
I'm writing a code in C, once we need a really fast application (the computer will run some important computations and should not be interrupted for too long).
I just read the change detection and I think that won't work that well. If I understood corretly, it triggers (starts) a task whenever it senses an edge. But by doing that, the MISO/MOSI ports would read/write whenever the edge occurs. That's not really the point. We need the MISO/MOSI to read/write while the SS signal is high. I mentioned the edge thinking of using it to activate a callback function to manage the read/write tasks. But I'd still have to think about the disabling part.
PS: I hope I was clear enough.
(Thank you very much for the help you're giving me)
I was looking at the DDK you sent me, but I can't find the PCI-6534 board there. Is the code for the PCI-6533 the same or equivalent?
What is the card/PC hosted program doing while SS is low?
What do you want the card to do once SS goes high? Are you generating a pattern, or is it more sophisticated stimulus/response communication?
Another thought I had was that we could use a state machine to control the activity on the card. SS low: do A. SS high: do B. The catch here is that task A will have to complete before the card will transition to task B. I assume you wanted to be able to interrupt task A and begin communicating as soon as the SS goes high.
A callback function is a good idea. You could tie the callback function (triggered from SS high) as well as a pause trigger to SS, so that when SS goes low, even if the communication is in progress, the communication is stopped. Alternatively, a hardware AND gate could be used instead of the pause trigger here (breadboard space permitting).
As far as the DDK goes, both the 6534 and 6533 use the same DIO ASIC, but I'm still working to determine how much extra work (if any) would be required to use the 6533-oriented files on a 6534.
The PC hosted program should be blocked/wait while SS is low. Once it goes high, a response communication should then be started.
The idea of the state machine wouldn't work because the process should be blocked, i.e. it shouldn't be in the processor anymore, so other processes can run.
Now we go back to the trigger idea. The only problem with it is that I couldn't set this trigger yet. I'll try again soon and update here.
The AND gate idea is actually really good. I need to find out if there's anyway to easily implement that into the system. If so, our problem is solved for good.
Just thought of a problem with the AND gate approach. The program would need to be reading the channel all the time so it would identify when the communication started... This is not good.
Answering about the delay to start reading, a comm. protocol will still be implemented. So it's interesting that it happens instantly, but not mandatory.
Looking back over this thread, I realized that I had failed to answer a question you had posed about whether or not the processor is free during a wait operation. It is (or atleast when using one of the wait functions available in LabVIEW/CVI)
LV Help Wait(ms)
How about if the AND gate was used in conjunction with a start trigger?
(edit: the arrow on the MOSI line should be pointed the other direction)
I am still looking at how the 6533's DDK files may be used with the 6534, but that may take a while.