How the hysteresis affects DIO input voltage levels of PCI-6602?

[Eyal]

The PCI-6602 digital I/O lines have the following specifications:

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Hysteresis ............................................... 300 mV Schmitt triggers

Digital logic levels:

         Level                         Min             Max

Input low voltage         –0.3 V            0.8 V

Input high voltage          2.0 V      Supply +0.3 V

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How the 300mV hysteresis affects the maximum LOW voltage of 0.8V and the minimum HIGH voltage of 2.0V?

Alternatively, where the hysteresis threshold voltages are located?

Thanks.

[Jason_D · Accepted solution]

Eyal,

My understanding is that from a logic high the Schmitt trigger will keep the signal high until the signal dips below at least 1.7 and above 1.1 for the corresponding .8V low logic level.  So by that the thresholds would be located at both .8 and 2.0.