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How is sampling window related to bandwidth?

Hi all,

 

Not sure if this is the best place to ask this question but I'm thinking how is sampling window(the duration of a single sample process) related to bandwidth of the sampled signal. Generally speaking the sample circuit would work like a lowpass but is there any function or something that could describe it?

Thanks in advance!

 

Lize

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Hello

 

I think will be better to put this question on the other forum (for example github or something else).

 

Best Regards

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Hi Hamlet

 

Thank you for the reply. I'll post this on other forums too. Also, btw, do you know if there is any setting that could change the sampling window? This question comes from my colleage who's working with NI9223 since many MCU have this setting but we haven't found any documentation about this one yet.

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The datasheet for this device mentions SAMPLE RATE not Window.  The sample rate is programmable for each input on this device.

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Hi minions

Thanks for the reply. But the sample rate is not actually what I'm looking for. What I mean is the time specified to charge the sampling capacitor. Ususally in a MCU, it's programmatically changable, e.g. you can set it to 20 MCU clock cycles or more and at the same time the sample interval to be 100 cycles. But I'm not sure if the NI deivice support this kind of settings.

Best Regards

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You are referring to the sample and hold capabilities of the card?  If that is the case, it already lists the maximum capabilities of the card as 1MSamples/second/channel or 1-sample every microsecond (max).

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