Digital I/O

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How do I send multiple synchronous digital signals across individual lines?

Using LabView 8.6 and PXIe/PCIe - 6536/6537, I need to simultaneously send multiple digital signals, each signal being sent through a seperate line. There are two main issues that I am having.

 

First I am exporting my Sample Clock through PFI4 and want to import it through PFI5 to send the digital signals synchronously but I can't determine which Timing Type is appropriate. I've tried using Burst Handshaking and Sample Clock using PFI5 as the source, however I recieve Error -89136 - "Specified route cannot be satisfied, because the hardware does not support it."

 

Second, when I attempt to fill the buffers for each line before starting the task I recieve Error -200022 - "Measurements: Resource requested by this task has already been reserved by a different task. Device: Dev1"

 

I have attached my .vi for reference.   Thanks in advance.

 

 

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Message 1 of 21
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Hey JackStaff,

Since you are doing co-related DIO you can have only one DI and one DO task because there is only one DI and DO timing engine. Try combining the digital lines to one and write it on the multiple lines, this will get rid of the resource reserve error.

 

-lab

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Lab,

 

Thank you for your response! This is an option that I had considered. However, I was going to go on with the program to create delays between the actual start time of the task and the receiving of the trigger in order to compensate for hardware delays. By combining these signals into one waveform I would have to create the delay of each signal in the initialization of the Boolean Array(used to create the waveform). I will also need to adjust the frequency of the signals individually. Which will also lead back to manipulation of the boolean arrays. Is there another way, or is that the best?

 

~JS

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Hey Jack,

 

Did you solved the problem...

 

I have the similar requirement.. but WIth PXI 6602 card ..

 

I want delays, Pulse width and frequency.... 

 

can you help me ? 

Message Edited by Hitesh Dhola on 08-17-2009 12:33 AM
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Message 4 of 21
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Hi Hitesh,

 

Can you elaborate more on specifics of your requirements?

Regards,


h_baker
National Instruments
Applications Engineer
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I am using PXI 6602 on real time system and DAQmx 9.

 

I want to generate continous pulses of 10 Khz on 40 seperate lines of DIO.

Each line is delayed by 10uS to previous line.

 

I have started with generating on only three  lines, but has some problems.

 

Problems :

 

first, 6602 DIO's are software driven. So, I cant gain up to 10 Khz.

Second, it is asynchronous. So, I cant synchronize all of them.

 

can you suggest some solution ?

 

 

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Message 6 of 21
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Hi,

 

I wanted to respond briefly to the original post (from Jack) because I see it was never fully answered.  I linked a couple of examples that show how to properly accomplish a loopback with the 6535/6/7 devices.  The first example linked below externally routes the clock (PFI 4 output to PFI 5 input) to follow the path of the data and then uses the data active event to start the acquisition.  The timing needs to be set to Pipeline sample clock mode though to be able to use the data active event.  The second example shows how to send and receive data on the same line and uses the data active event to start the acquisition with pipeline sample clock timing.

 

Continuously Generate and Acquire Source Synchronous Data with Software Compare

http://zone.ni.com/devzone/cda/epd/p/id/6186

 

Bidirectional Communication with the PCIe-6536 and PCIe-6537 (one line)

http://zone.ni.com/devzone/cda/epd/p/id/5285

 

Hitesh, These examples are for the 653x devices that have internal clocking so these examples will not work for you in your application.   

 

Regards,

Regards,
Jordan F
National Instruments
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Message 7 of 21
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Hi Hitesh,

 

You are correct in that the 6602 does not have correlated Digital I/O meaning that you only have software timing for the 32 digital lines.  I would recommend you to check out our high speed digital devices such as:

 

PXI-6541

https://www.ni.com/en-us/support/model.pxi-6541.html

PXI-6542

https://www.ni.com/en-us/support/model.pxi-6542.html

 

The above devices use our HSDIO driver, include 32 clocked channels, up to 50/100Mhz rate (divide down clock) and have the capability of fully synchronization with NI TClk.  To get the delay for each channel you would have to build your waveform to accommodate this.  That being said, to get a resolution of 10uS you need to have your clock rate at atleast 100kHz.  This would require oversampling your data (since you need 10kHz).  What you would have to do is repeat the output samples 10 times using the 100kHz clock and it would still seeem as if you were outputting with the 10kHz.

 

National Instruments T-Clock Technology for Timing and Synchronization of Modular Instruments

https://www.ni.com/en/shop/pxi/national-instruments-ni-tclk-technology-for-timing-and-synchroni.html

 

Another option, would be to go with our PXIe-6535/6/7 devices.  These devices are PXI express form factor, 32 clocked digital lines, use the DAQmx driver, and have rates from 20MHz to 50MHz.  You can synchronize the devices through the PXI backplane by exporting the clock and trigger from the master device. 

 

If you have any questions on this please let me know.  It is a lot of information so I would check out these options and see what would work best for your application.

 

Regards,

 

 

 

Regards,
Jordan F
National Instruments
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Thanks Jordan,

 

I appreciate your efforts. My final application needs 80 outputs, so, I has decided to use R series FPGA module. but, before I buy I have to prove my concept. So, I am trying with 6602 for 40 lines.

 

So, can you tell me is it possible with 6602 ?

 

Thanks again.

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Message 9 of 21
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Hi Hitesh,


There is no way that you can get the timing that is required for this application with the 6602 since it only has software timed outputs.  You could run this application at a slower rate (non deterministic) but not acheive the update rate desired.  The FPGA solution would likely work similar to the HSDIO devices because it has clocked digital outputs.

 

The FPGA solution requires LabVIEW FPGA and a knowledge of how to set up and program FPGA which is extremely different than programming the 6602.  So, this would not be a good comparison to build an application with the 6602 because it will not work with the FPGA device.  This is something to take into account when planning your application.


Regards,

 

  

Regards,
Jordan F
National Instruments
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