Digital I/O

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DIO Idle Direction


I am working with a PXI-7952R FlexRIO FPGA module in conjunction with the NI 6581 Digital Adapter Module.  The DIO lines only get used during certain tests and are idle the rest of the time.  By default I have them idle in the Read state.  My question is is it better to have them idle in the Read or Write state?  Or does it really matter?

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It really depends on the circuitry that you have them connected to.  If you have then connected to digital buffers or the like, I will usually just drive them low.  But setting them as an input is usually the safest route (makes sure you don't drive any voltages to places it doesn't belong).

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Ok that makes sense.  I had a catastrophic failure with one of my test systems that destroyed the 7952R, 6581, and a 7854R (data pins don't like 460VAC being applied to them).  Made some hardware changes to my circuitry to include MOVs for protection and was just looking for ways of protecting the DIO pins in software also (although I doubt there is much you can do in software against 460VAC).  Thanks for the information crossrulz.

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