I am trying to generate a digital pattern (1's and 0's) using PCIe 6537 board and LabVIEW 8.6.
The error I am getting using this is "Possible reason(s):Measurements: Onboard device memory underflow. Because of system and/or bus-bandwidth limitations, the driver could not write data to the device fast enough to keep up with the device output rate. reduce your sample rate, or reduce the number of programs your computer is executing concurrently."
This only happens if I increase my sample rate to more than 1MHz. My application has to be running at 8MHz and the output I am getting depends on the number of samples I input.
The VI I have attached has the information which is related to my application. In this VI the number of signals generated are 5 using "Dev1/port0/line0:4".
"Number of samples written per channel" actually divides the sample rate i.e. Sample rate/ number of samples written per channel.
In this VI I have set it to 1 MHz but if i try to increase it more than that it gives me the above error. For this corresponding VI the output frequency I am getting is 100KHz.
The Cards out put frequency is 50MHz, So if I can generate a similar pattern which would give me 8MHz output frequency that would be of great help.
this is refence with the post "http://forums.ni.com/ni/board/message?board.id=70&thread.id=11438"
If someone has a VI or if someone can point me towards something, then that would be a great help.
Thak You in advance.
In LabVIEW, go to Help -> Find Examples..., and then in the NI Example Finder click on Hardware Input and Output -> DAQmx -> Digital Generation. In this folder, I recommend that you check out the example called Cont Write Dig Port-Ext Clk-Non Regeneration.VI, as it looks like this example is similar to what you want to do. Of course you will want to change the clock source to onboard clock, and some other inputs. If this doesn't work, then you might also want to consider the error. The error is telling you that the data you are writing is not available fast enough to keep up with the device. So one thing you can do is to increase your samples per channel. Another thing is to check out the RegenMode property node, and try setting it to either Allow Regeneration, or Do Not Allow Regeneration.
There are other examples in the NI Example Finder, and specifically in the DAQmx Digital Generation folder that you can reference. Try them out, see what they do, then modify them a bit to see what the different changes do. One other example I could think of, which is similar to the one mentioned above, is the example called Cont Write Dig Chan-Pipelined Sample Clock.VI, which uses a sample clock mode that is specific to the 6535/6/7 devices called Pipelined Sample Clock mode. Checking out this example and the other examples in the example finder is one way to learn your hardware and how the software works. Another way you can learn more is to check out the NI 6535/6536/6537 Help, and the Context Help and Detailed Help on each of the DAQmx VIs.
I hope this helps. After checking out the examples and trying things out, let us know if there are further questions or concerns. Thanks, and have a great day.
Thank you for your help.
But the problem still remains with the overflow error.
Also i need to generate delays into the pattern i generate. I have attached an image file of wat i want to actually generate.
these are the control signals for my project that are to be generated from the card.
Please if u hv any suggestions on how i can improve my code, let me know.
You mention that the problem still remains with the overflow error, but what example did you try/use? I can't make any recommendations on how to improve your code if I don't know what you are doing in your code.
Now regarding the data you want to generate. I see that you have one file that is divided into 10 ns segments, but the 6537 (which uses the NI-DAQmx driver) can only generate or acquire data at maximum 50 MHz, which gives you 20 ns between each data point. If you want to get 10 ns, you will need to move to a 100 MHz (10 ns) high speed digital card (like the NI 654x or 655x cards that use the NI-HSDIO driver), or maybe even 200 MHz (5 ns) HSDIO cards (like the NI PXIe-6545 or NI PXIe-6548). When you have a faster clock rate, you can oversample your data to give you the delay in your data. But another Advanced Feature of the HSDIO cards, like the 655x and the 6545/48, is a feature called Data Delay. With Data Delay, you can generate your data either on the rising edge of the clock, the falling edge of the clock, or some delayed value from the clock. This feature is one delay value per board for the 6541/2 and 655x devices, but with the 6547/48, there are 3 different banks of channels that can have different data delay values (check out this 6547/48 dev zone doc - #3). Unfortunately, the 6537 does not have this data delay feature, so you would have to adjust for your delay either by oversampling, or by adjusting on your DUT board.
I hope this helps. Please provide some of your code if you want suggestions on your code. But again I would recommend trying some of the examples that I pointed you to in my last post. As far as the timing sets that you need, you might not be using the card that will do what you require. If I am mistaken in what I read out of your timing diagrams, then the 6537 might work for your application.