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Can I use PCI-7811R to acquire 20MHz serial A/D data?

Hi, I have a A/D board which ouput data through a serial interface, the signal timing and format are shown in flowing figure:

 original.jpg

CLK is 20MHz data clock, FS is frame start signal (falling edge indicates start of new frame), 

each frame contains 8 x 16 bits data for 16 channel A/D.

 

Is 20MHz CLK too high for 40MHz 7811R FPGA to sample the DAT signal?

 

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我认为可以,你可以考虑使用单tick循环来提高运行精度
Best Regards

Hu Yu
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