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Synchronization of two counters on 6601

I think i have a synshronization problem. I am using the 6601 card for counting the number of TTL pulses from a photon counter. There are two photon detectors, hence I am using two counters for the counting operation. Since the timing is in the order of micro sec i am using another counter as a clock to generate the clock cycle.So the counter creates clockcycles with creates time bins, between which the counting is done.
 
The program seems to be running fine. But when I connect the output of same photon detector to the two counters in parallel, their output graphs are not matching. In fact they are matching, but they are time shifted. That is one counter output has an extra time bin in the start of the count. And that too, it is random, either one of the counters take that extra time bin. I am placing the program as an attachment.
 
I tried to put a trigger pulse generator, but it is giving an error. Can someone help.
 
Thanks
 
Aj
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Message 1 of 10
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AJ,
You should be able to synchronize the start of multiple counters using the Arm Start Trigger.  You can access the parameters for this trigger via the DAQmx Trigger Property Node.  This trigger will not allow the counter to start counting until the arm trigger is received.  By configuring all counters to use the same arm trigger source, you can begin their counting at the exact same time.  See the attached VI.  I hope this helps!

Doug M
Applications Engineering
National Instruments
Doug M
Applications Engineer
National Instruments
For those unfamiliar with NBC's The Office, my icon is NOT a picture of me 🙂
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Hi
I have the same problem. I am counting pulses that come randomly on counter 0 and 1 of my PCI-6601 board.
As an external clock, I want to use continuous pulse train generated on counter 2 (and I hope this generation is not influenced by the OS).
I also want to stop, read and reset both counters on each falling edge of counter 2.
I have worked on your VI to synchronyze counters 0 and 1 with the rising egdes of counter 2, but I can't stop, read and reset 0 and 1.
Can you help me to do this?
Thank you

PS : I am using LV 7.0, so if you modify this VI, can you save it as a 7.0 VI?
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Hello fredni,

It sounds like you want to do is called a Buffered Period Measurement task, there's a diagram of this task type in the 6601/6602 User Manual p. 3-12.  In a period measurement you'll use the pulse train from counter 2 as your period and the pulses of counters 0 and 1 as the timebase.  You'll can set the period starting edge to be the falling edge and it will read and reset the counters on the falling edge of counter 2.  Below is a picture of the code.



Post if you have questions on this,
Micaela

Message Edited by McKala[DE] on 07-21-2006 02:58 PM

Micaela N
National Instruments
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OK, it seems to be a good idea, and I've worked on this example (see attached file).
The pulse train that I'll use as the period is generated on ctr2, witch output is physically wired from the PFI28 pin to the PFI0 pin witch is set to be the CI.Period.Term.
The pulses I have to count are connected to the PFI39 pin witch is the default source terminal of ctr.
When I run all this, it appears that "ticks" are not an appropriate unit for this kind of measurements. Why? Moreover, is there a cleaner way to route the output of ctr 2 to the gate terminal of ctr0? The Export Signals.VI and Route Signals.VI gave me some errors. Where's the mistake?
Thank you for any answer that could help me.
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Hey Fredni,

In response to "ticks" not being available, it looks like you may have selected a the CI.Frequency.Units property instead of the CI.Period.Units. Ticks should be available if you change to that property.

Also for signal routing, a good resource is Device Routes in MAX - just select the device and select the tab at the bottom of the window. It will show you that unfortunately, the output from counter 2 (PFI 28) cannot be internally routed to the gate of counter 0 (PFI38).

Hope this helps,

Andrew

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OK, thank you. For the "ticks", I think I was a little bit tired....
Now, for the routes, do you mean that I have to physically wire PFI28  to PFI38 and PFI34? If the cable lenght is not the same, haw can I be sure that ctr0 and ctr1 will be synchronized on the ctr2 signal output?
In MAX, there are 2 kind of routes : what are the "route via sub-system", in yellow?

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One more question:
in MAX, there is a direct route from PFI28 to Ctr0Gate and Ctr1Gate. But "Ctr0Gate" and "Ctr1Gate" are not available in the destination terminal list. Why?
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OK, I've juste solved my rounting troubles by myself. To find Ctr0Gate in the destination terminal list, wire an empty constant on the "destination terminal", then right-click, allow I/O filtering, and select "advanced terminal names" (or something like that...I have a Franch edition of LV!).
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