08-27-2013 06:49 PM
I am trying to use 4 counters to generate 4 signals, synchronized with external trigger (PFI 38). If I use counters 0 to 3, it fails to build a route connecting counter 0 internal output with start trigger of counter 1. - as on attached snippet.
If I use any other counter (4 to 7) instead of counter 0, it works fine.
I could not find anything forbidding the first configuration in NI Max device routes table. It shows only ArmStart trigger connections, they are directly connected to counters' internal outputs if in the same half (0-3 or 4-7) and through trigger bus if in the other.
Is there a way to develop a configuration like that without trying? Am I reading something wrong, is there complete routing documentation somewhere?
Daq mx 9.3, MAX 5.0
Solved! Go to Solution.
08-28-2013 02:18 PM
Alexander,
I think the problem may have to do with using consecutive counters as I was able to get it work with a few different combinations (i.e. ctr0,5,6,7). Also, I noticed that you are not currently stopping each task which may result in difficulties later on. To clarify, things do work just fine when you are using counters 4,5,6,7?
08-28-2013 04:30 PM
A finite counter output task (with at least 2 pulses) requires 2 counters on the 6602 (one counter to generate an output square wave and the second counter to gate it exactly when it finishes the last pulse). Consecutive counters are paired together for this purpose (ctr0-ctr1, ctr2-ctr3, ctr4-ctr5, ctr6-ctr7). You're running into problems because ctr1 is generating 2 pulses and so requires the use of ctr0 to accomplish this (if ctr0 is used for your other task it won't work).
Newer STC3-based hardware like X Series and CompactDAQ has internal (non user-accessible) paired counters which makes the device appear to be able to generate a finite counter output with a single counter.
Best Regards,
08-30-2013 10:44 AM
John,
Good to know that.
Unfortunately X series has only 4 counters and it is hard to add more: no RTSI synchronization. So, PCI-6132 or PCI 6115 + 1 or 2 PCI-6602 is our choice.
Also 6602 can not retrigger initial delay, but X series can. Do you know if it Is also implemented using that paired hidden counter?
James,
This is a snippet, the other part of block diagram has task control UI and all tasks clean up. You were also right, consecutive timers do not work together sometimes (when one of them is generating finite pulses) - see John's answer..
08-30-2013 11:27 AM
PCIe X Series devices do have RTSI synchronization, but it's true that they only have 4 user-accessible counters.
I don't believe the initial delay on retriggerable counter tasks for X Series is implemented with the hidden paired counter but is instead implemented by taking advantage of the card's ability to buffer its counter outputs on the hardware. In any case, the implementation shouldn't really affect the end-user.
If you are outputting a single retriggerable pulse on the 6602, you can get the initial delay on the retriggered pulses in DAQmx by setting the "Low Time" to whatever you wanted for the initial delay (see here). The same link also shows how one might get the desired behavior for a finite counter output task, though it requires the user to configure the second counter themselves.
Best Regards,