No, not with your M-series device. On that device, a finite pulse train uses both counters -- one to generate the pulse, one that's used in the background to gate the other with the precise timing needed to control the # pulses.
One of the advances of the X-series MIO boards is that finite pulsetrains only use a single counter.
One sneaky trick I've suggested is to make a dummy finite AO task that simply generates 0 V, but export its sample clock out to a PFI pin to be used as your 2nd finite pulse train. (You could do the same kind of thing with an AI task if that's otherwise idle.)