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Generate a pulse train

How do I generate finite pulse train of 3 pulses of 25us pulse width, pulse period (1/(7000Hz)), and retrigger the same finite pulse train every 588.23us with the PCI-6602?

What are the externals connections?
What is the right Labview programming?
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this can be done with the 6602 using multiple counters, but this board has 8 so you will still have many left over for other tasks.
You will need essentially 2 tasks, one taks is a retrigerable gated finite pulse train and the other is a simple finite pulse train.
I have done something similar using DaqMX and LV 7.0
To create the finite pulse train, create a CO.PulseTime task, create a channel setting the high times and low times (25 microseconds)and set the low polarity. I will assume that such a pulse train is going to trigger some external event or other DAQ card. Next set the timing to be implicit and sample mode to be finite and the number of pulses to be 3. To handle the retriggering and gate properities use a channel properitiy node and select:
StartTrigType = Digital Edge;
Start.Retrigerable = True;
Start.DigEdge.Edge = Rising;
Start.DigEdge.Src = PFI number of the out from the continious pulse train.
This last option will allow you to route the trigger from the controlling pulse trian to trigger your finite pulde train.
Now set up a second task to put out a continious pulse train with the period equal to the total durration between finite pulse trains (~500microseconds I dont have the exact number in front of me).
After creating these two tasks, start the retriggerable task first.
now when you start the continious pulse train you will get a finite pulse train of 3 pulses every time the rising edge of the continious pulse train fires. Stop and start the continious pulse train using software at will but only stop the finite task when you are done. Hope this helps.

-Paul
Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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There is an issue with DAQmx if the system doesn't have the Ni-Daq 7.3 or lastest version, anyway there are some devices that they don't support DAQmx. There is a list of the devices supported by NI-DAQmx and Traditional NI-DAQ in ftp://ftp.ni.com/support/daq/pc/ni-daq/7.3/readme.html. With the right software and hardware you will be able to configure or create virtual channels with DAQmx.
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I have attached the VI for this application. I'm assumming the system have the NI-DAQ 7.3
I have configured my PCI-6601 or PCI-6602 for device 2. The physical connections are Out 3 (pin 29) to
PFI-0 (pin 10). The default values are set up to output on Out 0 (pin 5).
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I have modified a similar problem to try to help you out. It was tested using LV 7.0, DaqMX 7.2 and a 6602
Just run the example, pless the start/stop pulse train and check the PFI26 pin out on your scope, hope thsi works for you. Also I have configured my 6602 under MAX to be "dev1" logical name.


-Paul
Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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Also sorry about the sloppy code, I should have used more sub-vis but I was just trying to make it functional durring lunch.

Paul
Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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