Error 200452 when time delay is added to retriggerable pulse output

[h._vo]

Requirement:  Need to introduce a time-delay to retriggerable pulse output; so the LabVIEW example "Counter- Single Pulse Output.VI" was tried to generate retriggerable pulse outputs on Dev1/Ctr 1 with a DAQCard 6062E installed on a Laptop running  Win10-32bit, LabVIEW 2016.

Problem:  encountered Error 200452 when a time delay element is added to  "DAQmx Trigger" property node. 

Q1:  How do we solve this?  Can this be done with a single counter?

VI setup:

   Output TML: PFI8 (CTR0 SRC); trigger setting PFI4 (CTR1 Gate) on triggered pulses at 8s intervals, 0.010s pulse width. 

Q2:  It's also odd that I can only select PFI8/CTR0 SRC for my Output TML, and not CTR1 OUT .  Should  CTR 1 OUT be the output? 

[Kevin_Price]

Attempting to use the trigger delay property was a sensible try, but it turns out that's not the way to set the time interval from the incoming pulse to your outgoing pulse.

The delay timing for retriggered pulses and pulse trains are controlled by some combo of "initial delay" and "low time" (assuming a Low idle state and active high output pulse).  The exact way these are used can differ across different series' of boards, so you'll need to check the docs for your E-series board in particular.  Note: it's possible that the 1st pulse will inevitably have a different delay than all subsequent pulses.  I don't recall whether it was the E-series counters with this limitation, but *some* board series had it.

I don't know what you mean by "Output TML".  The E-series boards have limited routing options which you can find under the "Device Routes" tab in MAX after selecting your device.  Look for green boxes allowing you to route directly from Ctr1InternalOutput to various possible output destinations.

-Kevin P