Counter logic confirmation

[jars121]

G'day,

I'm coming here from this post, with the aim of confirming my understanding of counters in Labview.

I've tried to build stable, accurate square wave output waveforms using software timing, which isn't going to work for my application. As such, I'll be selling my PCI-6509, and replacing it with either a PCI-6601 or 6602. What I'd like to confirm is the following; can each counter task in Labview (I'm using 2014) be used for multiple digital outputs (DAQmx Write)? My understanding is the counter can be used to increment a shift register, so I can change (during runtime) the frequency of two separate DO channels by changing their respective rate of going HIGH/LOW as the shift register increments.

I.e. the rate of change of the shift register is static, and determined by the hardware clock on the PCI card (e.g. 100kHz). SquareWave1 might toggle HIGH/LOW every 100th increment, whereas SquareWave2 might toggle HIGH/LOW every 200th increment. These numbers (100, 200) could be controlled (during runtime) with a slider, gauge, etc.

Is my understanding correct? I'm trying to gauge whether I'll need the 4-counter (6601) or 8-counter (6602) card, as I'll certainly need more than 4 accurate square wave outputs. If my understanding is NOT correct, I'll opt for the 6602. If my understanding is correct and I can share a single counter with multiple DAQmx Write events, then the 4-counter card will be sufficient.

Thanks!

[Kevin_Price]

To my reading, some of your use of terminology suggests some misunderstandings.  I'll respond in place in red text.

---

@jars121

I'm coming here from this post, with the aim of confirming my understanding of counters in Labview.

At the end of that post, you referred to 32 TTL signals.  Do you need 32 distinct, precise, and individually controlled pulse trains?

I've tried to build stable, accurate square wave output waveforms using software timing, which isn't going to work for my application. As such, I'll be selling my PCI-6509, and replacing it with either a PCI-6601 or 6602. What I'd like to confirm is the following; can each counter task in Labview (I'm using 2014) be used for multiple digital outputs (DAQmx Write)?

No.  Each counter can produce 1 output.   Counters are treated distinctly from DIO on NI DAQ boards.  Be aware that the 660x family of boards do *not* support hardware-timed DIO.  Any board I know of that does support hardware-timed DIO does not support independent timing on different digital lines.  They all share 1 timing engine.

My understanding is the counter can be used to increment a shift register, so I can change (during runtime) the frequency of two separate DO channels by changing their respective rate of going HIGH/LOW as the shift register increments.

No.  A counter pulse train will have specs for high time and low time.  The pulse signal goes to 1 output terminal.  You can change the high/low time specs on the fly, but not before your last change was used.

   Your talk about incrementing shift registers sounds like a misunderstanding.

I.e. the rate of change of the shift register is static, and determined by the hardware clock on the PCI card (e.g. 100kHz). SquareWave1 might toggle HIGH/LOW every 100th increment, whereas SquareWave2 might toggle HIGH/LOW every 200th increment. These numbers (100, 200) could be controlled (during runtime) with a slider, gauge, etc.

Something like this can be done with 2 counters, 1 for each square wave.  There's no "shift register" involved, you would just set up the pulse specs as a # of ticks equal to either 100 or 200.  You could change those dividers during run-time but as mentioned before, you can't change them until the task has had a chance to use the previous specs.

Is my understanding correct? I'm trying to gauge whether I'll need the 4-counter (6601) or 8-counter (6602) card, as I'll certainly need more than 4 accurate square wave outputs.

If you need more than 4 accurate (and independent) square wave outputs, you'll need more than 4 counters.

If my understanding is NOT correct, I'll opt for the 6602. If my understanding is correct and I can share a single counter with multiple DAQmx Write events, then the 4-counter card will be sufficient.

Your understanding seems sufficiently murky that I'd advise against making a final decision yet.  Read on...

---

- How many distinct output signals do you need?

- Do the output frequencies need to vary independently?  Or do they need to have a variable rate where they all change at once while staying in sync relative to one another?   If it's the latter, I'd recommend a whole different approach with an X-series MIO board.

-Kevin P

[jars121]

---

@Kevin_Price

---

Kevin,

Thank you very much for reviewing my linked post and for providing a detailed response. This is my first foray into DAQ and Labview, so your assertion that my understanding is murky is spot on.

I've responded to each of your points below.

 wrote:

To my reading, some of your use of terminology suggests some misunderstandings.  I'll respond in place in red text.

---

@jars121

I'm coming here from this post, with the aim of confirming my understanding of counters in Labview.

At the end of that post, you referred to 32 TTL signals.  Do you need 32 distinct, precise, and individually controlled pulse trains?

I'm using Labview (and the associated DAQ hardware) to simulate inputs to my application. My application has 32 digital inputs, which are user configurable as either digital (ON/OFF) or pulse (PWM, duty cycle, etc.) measurements. As such, I need 32 TTL signals, of which, I'd like ~8 to be hardware-timed pulses.

I've tried to build stable, accurate square wave output waveforms using software timing, which isn't going to work for my application. As such, I'll be selling my PCI-6509, and replacing it with either a PCI-6601 or 6602. What I'd like to confirm is the following; can each counter task in Labview (I'm using 2014) be used for multiple digital outputs (DAQmx Write)?

No.  Each counter can produce 1 output.   Counters are treated distinctly from DIO on NI DAQ boards.  Be aware that the 660x family of boards do *not* support hardware-timed DIO.  Any board I know of that does support hardware-timed DIO does not support independent timing on different digital lines.  They all share 1 timing engine.

I accept that each counter can produce only 1 output, thank you for clarifying. I'm not quite as sure regarding your 660x family comment. My reading of the 6602 datasheet (for example) suggests that it has 8 hardware-timed counters, with up to 32 DIO channels (if not using the counters as counters). Are you saying that the 8 counters use the same timing engine? I.e. the card is set to 100kHz and all 8 counters use this timing? 

My understanding is the counter can be used to increment a shift register, so I can change (during runtime) the frequency of two separate DO channels by changing their respective rate of going HIGH/LOW as the shift register increments.

No.  A counter pulse train will have specs for high time and low time.  The pulse signal goes to 1 output terminal.  You can change the high/low time specs on the fly, but not before your last change was used.

   Your talk about incrementing shift registers sounds like a misunderstanding.

I played with a Simulated counter task in MAX last night, so understand the setting of high/low time now. Adjusting the high/low time in runtime makes sense, so that should all be workable. The use of shift registers was based on my current attempts to generate software-timed pulses, I can see now how it's irrelevant for a hardware counter. 

I.e. the rate of change of the shift register is static, and determined by the hardware clock on the PCI card (e.g. 100kHz). SquareWave1 might toggle HIGH/LOW every 100th increment, whereas SquareWave2 might toggle HIGH/LOW every 200th increment. These numbers (100, 200) could be controlled (during runtime) with a slider, gauge, etc.

Something like this can be done with 2 counters, 1 for each square wave.  There's no "shift register" involved, you would just set up the pulse specs as a # of ticks equal to either 100 or 200.  You could change those dividers during run-time but as mentioned before, you can't change them until the task has had a chance to use the previous specs.

As above, this now makes perfect sense 🙂 

Is my understanding correct? I'm trying to gauge whether I'll need the 4-counter (6601) or 8-counter (6602) card, as I'll certainly need more than 4 accurate square wave outputs.

If you need more than 4 accurate (and independent) square wave outputs, you'll need more than 4 counters.

At this stage I'd love 10+ counters, but would settle for 8 if need be. 

If my understanding is NOT correct, I'll opt for the 6602. If my understanding is correct and I can share a single counter with multiple DAQmx Write events, then the 4-counter card will be sufficient.

Your understanding seems sufficiently murky that I'd advise against making a final decision yet.  Read on...

Pending some feedback on my query regarding the 660x family above, it's looking like the 6602 could be a suitable fit.

---

- How many distinct output signals do you need?

I'd like 32 distinct DIO channels, of which up to 8 being hardware-timed pulse generators.

- Do the output frequencies need to vary independently?  Or do they need to have a variable rate where they all change at once while staying in sync relative to one another?   If it's the latter, I'd recommend a whole different approach with an X-series MIO board.

 The frequencies of the hardware-timed pulse channels are independent. I.e. each one would have it's own frequency slider/gauge to control HIGH/LOW times in runtime.

-Kevin P

[Kevin_Price]

With a 6602, you get 8 counters whose frequencies or high/low times can be controlled independently.  There's a master internal timebase of 80 MHz and two derived ones at 20 MHz and 100 kHz.  Any counter used for continuous output can derive the specs for its timing from any of these timebases independent of what the other counters are doing.  (Note: finite pulsetrains on the 6602 and M-series boards "secretly" use both the counter you ask for and its adjacent "paired counter."  X-series boards support finite pulsetrains that use only a single counter.)

The 32 DIO lines on a 6602 can *not* be hardware-timed in DI or DO tasks.  Some of the output terminals available for use as DIO are also available for use as Counter inputs and outputs.  So some pins can produce hardware-timed signals, but only when used as part of a counter task.

If I remember correctly, CTR0 and CTR1 get dedicated pins for their inputs & outputs.  CTR2-7 share those pins with DIO.  So if you generate 8 counter pulse trains, you'll use up 6 of the available pins for DO, leaving 26.  Any DO you generate will need to be software-timed on-demand tasks.

I agree that it sounds like the 6602 may be suitable, giving you up to 8 channels of hardware-precise pulse train output and another 26 (I think) software-timed digital outputs.  You could consider adding another 4 pulse trains with either a 6601 or an X-series board (which would provide a whole lot of additional I/O capability beyond the counters.)

-Kevin P

[jars121]

Brilliant, thanks Kevin, much appreciated!

That all makes sense to me. The use of up to ~26 event/software driven DO pins in conjunction with 8 independent counters will be entirely adequate for my application.

Thanks again!